I see, you want to watch the smoking things...
You know, it is not this a big problem when start to load such capacities (without smoking...). It could be a problem about how long time will take such process... And it could be a challenge to find a solution to get rid of that energy after power off...
Thanks to RayCtech if he can come with some comments about those aspects.
I will see... I think it is an interesting area to experiment... Anyway, experimenting is not synonym to succeeding in a task, or have the solution for something.
I hope not... probably your psu has current limiting ? So it simply.... won't work. But maybe you can pre-charge the caps with a car battery.... perhaps hard to do with a 3.8V DAC.... as Ray said, you really do have to design for large caps/cap banks. It's a real challenge to just add them later and not mess something up.
Besides anything else, big caps have a certain sound.... so you might consider bypassing them with fast caps - film caps like Sonicap in decades - 10uF, 1uF - and then even faster Vishay MKP1837 0.1uF, 10nF or Relcap RTE. Anyway, maybe you know all this already ... but it's worth repeating since this thread seems to have turned this way.
Personally, having tried this kinda thing before, it's not a sound I like. I winced when I saw the Audiocom board, and hoped none of the solid polymer caps were on analogue power lines. Each to their own I guess.
Besides anything else, big caps have a certain sound.... so you might consider bypassing them with fast caps - film caps like Sonicap in decades - 10uF, 1uF - and then even faster Vishay MKP1837 0.1uF, 10nF or Relcap RTE. Anyway, maybe you know all this already ... but it's worth repeating since this thread seems to have turned this way.
Personally, having tried this kinda thing before, it's not a sound I like. I winced when I saw the Audiocom board, and hoped none of the solid polymer caps were on analogue power lines. Each to their own I guess.
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You need to evaluate the circuits you need and implement that..
With 1F to 10F capacitors I have implemented circuits that can charge and discharge them or simply disconnect and connect them after the initial charge.. In some cases also MCU control or a simple logic control for protection and safety.
just use properly low noise regs that dont need such crazy filtering in the first place, or batteries, since thats effectively what caps are at that size. just putting them on normal regulators or wide bandwidth flea type regulators is an experiment doomed to fail, a dangerous one, since you seem to insist on DC coupling.
Coris I see you only took these suggestions by Ray as positives and did not notice the strong warnings as well as thanking him for the things he said, some things that I have been saying to you for months. enjoy that extra 1-2db you might get from higher AVCC, that 1-2db will be swallowed well and truly by your following gain structure. remember ive been through this with you, this will only ADD to your problems here. your poweramps have significantly more gain than you can use already.
first things first....
seeing to your gain structure will provide much more tangible improvement than increasing AVCC, or adding huge caps. this was yet another conversation where my trying to help you, linking to the articles etc, turned into you playing the victim because what I said wasnt what you wanted to hear.
you continue to push in a direction that brings you no benefit while the rest stays the same, in fact it will bring more harm. with so much gain already on your IV stage, you could probably use 3-6db of gain before the amps start distorting.
Coris I see you only took these suggestions by Ray as positives and did not notice the strong warnings as well as thanking him for the things he said, some things that I have been saying to you for months. enjoy that extra 1-2db you might get from higher AVCC, that 1-2db will be swallowed well and truly by your following gain structure. remember ive been through this with you, this will only ADD to your problems here. your poweramps have significantly more gain than you can use already.
first things first....
seeing to your gain structure will provide much more tangible improvement than increasing AVCC, or adding huge caps. this was yet another conversation where my trying to help you, linking to the articles etc, turned into you playing the victim because what I said wasnt what you wanted to hear.
you continue to push in a direction that brings you no benefit while the rest stays the same, in fact it will bring more harm. with so much gain already on your IV stage, you could probably use 3-6db of gain before the amps start distorting.
Man, I have normal ultra low noise voltage regulators in function today (and for few month ago)! And they work very well.
I do not take or took the Ray`s suggestions just blind as positive. He came her with the information that he used huge capacities. I used too this quite big decoupling capacities with good results (but not so big as him). So it seems to me that it is possible one can also use huge filtering/decoupling capacities. I only found this idea interesting. Is my opinion. I do not know how it will work, and what kind of improvement it will bring, or if it will bring at all something. I just want to try and see what it may happen.
Else, yes I know that decoupling capacities it have to be paralleled in different ways/values/types, to work as it should.
As soon as I will have the opportunity to start to work again in this field, I will review the gain distribution/levels in my system, and I will come back here with details.
I`m aware that improvements it may come from different directions. I have tried only few, I know that. After I will be comfortable with what I get in one direction I will switch to another one. This is my strategy so far.
Else I care enough to not destroy something, as it cost quite much... I do not do it to destroy things, or take blind risks without take precautions...
Unfortunately, I can not show you how well it works my actual system. But just believe me that it works just fine... with all that "bad things" in it: huge overclocking, over AVCC power, big decoupling capacities, huge gain in the system, no any HF filtering, but low HF noise anyway, and so on...
I do not take or took the Ray`s suggestions just blind as positive. He came her with the information that he used huge capacities. I used too this quite big decoupling capacities with good results (but not so big as him). So it seems to me that it is possible one can also use huge filtering/decoupling capacities. I only found this idea interesting. Is my opinion. I do not know how it will work, and what kind of improvement it will bring, or if it will bring at all something. I just want to try and see what it may happen.
Else, yes I know that decoupling capacities it have to be paralleled in different ways/values/types, to work as it should.
As soon as I will have the opportunity to start to work again in this field, I will review the gain distribution/levels in my system, and I will come back here with details.
I`m aware that improvements it may come from different directions. I have tried only few, I know that. After I will be comfortable with what I get in one direction I will switch to another one. This is my strategy so far.
Else I care enough to not destroy something, as it cost quite much... I do not do it to destroy things, or take blind risks without take precautions...
Unfortunately, I can not show you how well it works my actual system. But just believe me that it works just fine... with all that "bad things" in it: huge overclocking, over AVCC power, big decoupling capacities, huge gain in the system, no any HF filtering, but low HF noise anyway, and so on...
There is actually already created that thread (http://www.diyaudio.com/forums/digital-line-level/196474-ess9018-try-new-try-more.html)
Sorry for disturbing you here with my interventions. I did not think it were so painfully...
Sorry for disturbing you here with my interventions. I did not think it were so painfully...
I got no counter comments on my speculation quoted above on this thread.
In a popular blog that one of regular members of this thread runns, a famous pioneering ES9018 based DAC kit designer showed his similar idea on this topic as his comments to a topic in the blog. (The designer might be the first person that recognized the advantage of synchronous master clocking as a designer outside ESS.)
A very active developer of FIFO buffers also expressed an similar understanding on his own thread of this forum.
Our speculation will give the following result by inference;
It must be useless to stick to jitters < 10ns on I2S/DSD input signals as long as you use asynchronous master clock of 100 MHz.
By the way, you may find some useful information in US Patent documents listed in the following page.
Dustin Forman - Canada | LinkedIn
What about asynchronous master clock of 125 MHz (or max working)?
It still the same assertion valid: it must be useless to stick to jitters < 8ns on I2S/DSD input signals as long as you use asynchronous master clock of 125 MHz?
Is then better solution to use lower clock frequency, because better jitter tolerances (>10ns) for entire system?
As known, the higher the clock frequency, the lower its (induced) jitter errors for the same used working domain...
It still the same assertion valid: it must be useless to stick to jitters < 8ns on I2S/DSD input signals as long as you use asynchronous master clock of 125 MHz?
Is then better solution to use lower clock frequency, because better jitter tolerances (>10ns) for entire system?
As known, the higher the clock frequency, the lower its (induced) jitter errors for the same used working domain...
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on the analogy of following posts, I think the reason is to avoid a meta stable when counting BCK(input clock) by MCLK(ref clock).
I'm quite surprised ESS haven't specified an optimum clock, or given data about the relationship between clock freq, jitter, sample rate, etc etc. I'd expect it in the datasheet, wouldn't you ? Has anyone done such tests and published the data ?
Four years on and people still can't download the barely adequate data sheet, and it seems quite a few things about this IC are still unknown; for example, jitter immunity, optimal clock speed for common sample rates, etc etc.
So how about asking ESS directly on behalf of the diy community ? I can't believe they would think it's in their interest to keep such information a secret.
Anyway, my point is, why guess when you can ask ?
ESS Support Contact
Four years on and people still can't download the barely adequate data sheet, and it seems quite a few things about this IC are still unknown; for example, jitter immunity, optimal clock speed for common sample rates, etc etc.
So how about asking ESS directly on behalf of the diy community ? I can't believe they would think it's in their interest to keep such information a secret.
Anyway, my point is, why guess when you can ask ?
ESS Support Contact
Even if jitter tolerance is around 10nS at the input of the DAC in asynchronous mode that doesn't mean that after the internal ASRC the I2S lines have jitter.
The problem here is the ASRC sound signature which becomes transparent in synchronous mode. In this mode the I2S input must be as jitter free as possible in order to have a good program fidelity.
Have you tried your self to ask something directly to ESS?
They never answer! That`s why some informations still be unknown... They are not friendly to give informations. There are only few people who were allowed or chosen by ESS to have some more informations than it is in that almost secret datasheet... And those informations have come out very selective...
There is a really strange behaviour of this company.
Hi,
I'll try and let you know.
Tom
Wow, that was fast. It won't even accept any of my work or private email addresses. ********* won't even take an enquiry. Anybody wanna buy my DAC ? Seriously. I'm not supporting crap companies like that.
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