Cheap 100 to 150 Watt Amp

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Jan dupont and his lynx pages also provide models for vi limmiters based on the lynx also the lynx has a very detailed presentation that you may be able to see some info from there

Sakis, I very much appreciate your suggestions, but could you please be a little more specific with the search key words? I'm either coming up with tons of unrelated posts or nothing except your references to the topic I'm searching for.

Thanks.
 
Inserting earther in search found the 13 references that I posted in DIYaudio. There are a further 72 DIYaudio references.
You could type in benson for more.
Here's a few to start you off.
http://www.diyaudio.com/forums/soli...-into-different-phase-angles.html#post1161057
http://www.diyaudio.com/forums/soli...-into-different-phase-angles.html#post1162232
http://www.diyaudio.com/forums/soli...-into-different-phase-angles.html#post1162351
http://www.diyaudio.com/forums/soli...sistor-safe-operating-area-2.html#post2297122
http://www.diyaudio.com/forums/soli...sistor-safe-operating-area-2.html#post2309271

I have checked all 9 DIYaudio links, they work they are alive.
GK links are dead.
Silicon chip links are dead.

That's why I keep reminding Members to use DIYaudio for storage (keep them small and bandwidth efficient), not some long forgotten remote server.
 
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Thanks, that did finally lead to an article with the design process and the equations for the VI limiter circuit. It also reviewed the performance of such circuit, and here's what that analysis said...

...
This suggests that in 300W/4 Ohm operation, while the output stage will in fact survive loads producing a typical practical degree of V-I phase shift, frequent intervention of the protection circuitry is to be expected.
...
And that's basically what I was saying about the VI limiter. I couldn't get it to stay inactive when driving a 4-Ohm load. And I didn't even look at an inductive load. That was just with a resistive load. This partly has to do with the limitation of using only a pair of TIP142/147 transistors. I also looked at using the MJH11021/11022 pair, and although it was easier to keep operation inside the SOA, it still wasn't good enough. Plus, my simulation said the distortion would increase with the bigger darlingtons. So I stuck with the 142/147 pair.


That's why I came up with my non-linear, active sensing VI circuit. It keeps the VI limiter inactive... at least for resistive loads.
 
...
This suggests that in 300W/4 Ohm operation, while the output stage will in fact survive loads producing a typical practical degree of V-I phase shift, frequent intervention of the protection circuitry is to be expected. ...
That conclusion indicates one of two scenarios.
Either that the designer did not know how to design an audio amplifier IV limiter
or
That the designer adopted an amplifier that was not up to the task of driving the specified load and used the IV limiter to save warranty returns.

A properly designed IV limiter should allow all valid audio signals to pass to all valid speaker loads. While playing unclipped music (other audio signal) into a speaker matching or exceeding the minimum rating of the amplifier, the limiter should never interfere with the signal being passed.
 
Thanks, that did finally lead to an article with the design process and the equations for the VI limiter circuit. It also reviewed the performance of such circuit, and here's what that analysis said..

Which article was that?

I would also urge you to refer to the Michael Kiwanuka source I gave earlier.
It is his analysis method (and caveats therein) I used to create the protection locus shown in the Excel spreadsheet attached, using Fig A schematic.

By the way, this can be configured for some of the more common (but less preferable) VI arrangements (e.g. Fig B, Leach style) by simply increasing the redundant R to, say 100Meg, effectively excising it from the schematic.

The load lines are derived using David Eather’s method.

The locus shown prevents any transgression beyond the DC 50°C temp de-rated SOAR but the 4R reactive load and lower will be cause triggering. Note that this applies to all programme frequencies down to DC.

The addition of the low pass network R5C1 allows the load line(s) to exceed the protection limit safely (except 2R reactive), down to some low frequency while allowing v.l.f. signals and DC to trigger it. What that frequency should be is open to debate, but Doug Self, in an article on muting relays and DC offset protection, suggested a full power frequency of 2 Hz, to avoid false triggering, which equates to a turnover frequency of around f/4 i.e. 0.5 Hz. i.e. 500ms. This may be a little too conservative; many suggest around 100-250ms.

This is by no means the only consideration; for instance, the duty cycle of the l.f. signal, and/or the repetition rate may violate the chosen pulse response of the output device, thus the immediate past history of the signal can influence the SOAR de-rating chosen (maybe 500ms isn’t so conservative, after all)
Choosing this pulse response when none are given in the device SOAR data, as here, is even more of a problem!

So for a real “transparent” VI limiter with one device pair @+/- 45V 100-150W, :(

Brian.
 

Attachments

  • SOAR_30V_1xTIP142_0.33_50c.xls.zip
    26.1 KB · Views: 87
Pingrs,
I see you have chosen to de-rate current and not voltage for increased Tc.
David Eather de-rated voltage, I think you are right and he was wrong.

I also note the similarity between your graphs and those that Bensen posted.
Have you copied or no need to credit Bensen?

If the protection transistors are attached to the respective output devices (that they are current limiting) then the reduced Vbe of the protection transistor as the output device heats up brings on slightly earlier triggering of the IV limiter. It does not track the temperature de-rated SOAR at all well, but it does bring in a proportion of SOAR temp compensation.

Yes, setting some resistor values to near infinity, allows different protection circuit topologies to be analysed.

Rather than show the 25degC Tc SOAR, I show the 100ms and 10ms SOAR (if available) for comparison to the DC or 1second SOAR.
 
Pingrs,
I see you have chosen to de-rate current and not voltage for increased Tc.
David Eather de-rated voltage, I think you are right and he was wrong.

I also note the similarity between your graphs and those that Bensen posted.
Have you copied or no need to credit Bensen?

If the protection transistors are attached to the respective output devices (that they are current limiting) then the reduced Vbe of the protection transistor as the output device heats up brings on slightly earlier triggering of the IV limiter. It does not track the temperature de-rated SOAR at all well, but it does bring in a proportion of SOAR temp compensation.

Yes, setting some resistor values to near infinity, allows different protection circuit topologies to be analysed.

Rather than show the 25degC Tc SOAR, I show the 100ms and 10ms SOAR (if available) for comparison to the DC or 1second SOAR.

Hi Andrew,

This isn't my first post here; I did credit Mr Jansenn as the "Excell" author of Dave Eather's analysis in the attachment to that post so yes, I didn't feel the need to repeat it. To those who didn't see it, however, he indeed developed that spreadsheet, in a log-log format. I showed that because some might prefer it that way. I developed a macro to translate log SOAR plots to linear plots, to allow the protection locus to be described as straight lines, which is how they are more usually visualised.
Tracking the output device temp could be a useful improvement, if somewhat awkward to apply to a pcb layout. It would lower the Vbe trigger voltage which may result in slightly different resistor values.
Yes, my point was that some SOAR plots don't show any pulse responses at all. If they are there, I use them (the attachment referred to above is a case in point). How do we determine where 100ms, 10ms or whatever should lie in their absence?
And like you, I would love to know of a LTSpice method of simulating a protection response.

Brian.
 
Tracking the output device temp could be a useful improvement, if somewhat awkward to apply to a pcb layout. It would lower the Vbe trigger voltage which may result in slightly different resistor values.
set the model up with "warm or normal" values of resistors, Vbe, currents etc.
See the "normal" SOAR locus.
Now reset the protection transistor Vbe to a cold value (due to being attached to an operating amplifier that has not yet warmed up). see the new "cold" SOAR.
Now reset the protection transistor Vbe to a hot value (the system is playing loud at a party and the Ta has gone from 20degC to 37degC) and compare the "hot" SOAR.

The Cold setting allows maximal output currents before triggering.
The Hot setting allows much lower output currents before triggering.

But, the protection locus does not "track" the changes of the temperature de-rated SOARs.

No need to change any component values to obtain this "free" temp compensation. But it offers something that is better than holding the protection transistors at a near cold temperature. It protects a hot amplifier and allows more output when the amplifier is cooler.
 
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set the model up with "warm or normal" values of resistors, Vbe, currents etc.
See the "normal" SOAR locus.
Now reset the protection transistor Vbe to a cold value (due to being attached to an operating amplifier that has not yet warmed up). see the new "cold" SOAR.
Now reset the protection transistor Vbe to a hot value (the system is playing loud at a party and the Ta has gone from 20degC to 37degC) and compare the "hot" SOAR.

The Cold setting allows maximal output currents before triggering.
The Hot setting allows much lower output currents before triggering.

But, the protection locus does not "track" the changes of the temperature de-rated SOARs.

No need to change any component values to obtain this "free" temp compensation. But it offers something that is better than holding the protection transistors at a near cold temperature. It protects a hot amplifier and allows more output when the amplifier is cooler.


Thank you


Brian.
 
Which article was that?

I would also urge you to refer to the Michael Kiwanuka source I gave earlier.
It is his analysis method (and caveats therein) I used to create the protection locus shown in the Excel spreadsheet attached, using Fig A schematic.

Following links in Andrew's posts led me to the ETI466 design document here:

ETI-466 Amplifier Technical Review

Section 2.5.3 describes the protection calculations. SOAR calculations are linked to as Appendix 1, therein. I'd like to hear your opinion of that limiter design.

I downloaded the spreadsheet you linked and hope to look at it this week. Got sidetracked learning OLG analysis with LTspice.

But I think it's pretty clear that you, Andrew and Sakis are right about one thing. A TIP142/147 pair is not going to reliably deliver 150W of power at 4-Ohms. 100W might be borderline... and there's no joy like putting 10 pounds of "stuff" in a 5 pound bag. :)
 
led me to the ETI466 design document here:

ETI-466 Amplifier Technical Review

Section 2.5.3 describes the protection calculations. SOAR calculations are linked to as Appendix 1, therein.

......where I first saw the reactive load line calculations.
and more importantly, it is all explained simply and shows the hand calculation method.
Once one understands what the sums are doing then one is ready to start using software to speed up the arithmetic, but one must be able to check that the software is giving the correct answers.
I can only do that by understanding what the software is doing. I need to be able to work out the sums some other way as a check that I am asking the computer the correct questions

I think that's where Eather went wrong by de-rating voltage instead of current and where Bensen went wrong with his initial spreadsheet. They didn't ask the right questions even though both knew the arithmetic from beginning to end.
 
Brian,

...
I would also urge you to refer to the Michael Kiwanuka source I gave earlier.
It is his analysis method (and caveats therein) I used to create the protection locus shown in the Excel spreadsheet attached, using Fig A schematic.
...

I've been looking at the spreadsheet you posted and the one from the Leach amp. So I have a gist of what was done there, but haven't been able to get a total grasp because both of the spreadsheets are incomplete. Your calculations rely on a sheet called MASTER_SOAR_30V_1xTIP142_0.33_50c.xls. I think that's just the databook SOA table for the TIP142, but I'm not sure of the format. Also, I'm having no luck finding the Kiwanuka article you referenced. Can you please point me to a copy?

Thanks
 
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M. Kiwanuka's article is copyrighted.
Download Bensen's spreadsheet or Email me for my modified versions of Bensen's spreadsheet.

What stage are you at with Eather's paper?
downloaded?, read once?, fully understood?, memorised? you can do your own hand calculated plots for your devices loaded with your amplifier PSU and speaker, or lost in the swamp?
 
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What stage are you at with Eather's paper?

I read and understood the Ether article. The relevant part it adds is the systematic computation of the load line and how to work that back to the driver & output devices. It does not speak to V-I limiter design.

I have 2 copies of Bensen's spreadsheets, they are pretty much the same. They're very good and complete, but do not speak to V-I Limiter design. Pingrs spreadsheet does. I'm confused about something. Pingrs talks about a power calculation error in cell B9 of Ben Janssen's spreadsheet. Ben Janssen is the same as Bensen. Yet, the two Bensen spreadsheets I'm looking at have no calculation in cell B9.

I'm not criticizing, I'm just trying to understand what's going on in those calculations. All of these spreadsheets are excellent and impressive work.

Looking at just the resistive load, I thought there was a lot of room to push more power through an 8-Ohm load. But the reactive load line says it ain't so.
 
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