Influence of the delay amplifiers for listening characteristics

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The main contribution to voltage drop at the base resistance Q1 - Q3 and Q4 - Q2.

Ib is dependent on Ic as well.

The tree factors affecting Vdif at DC are:

1: Ib
2: Ic balance
3: Vbe

A DC servo does not necessarily solve either of these problems. It only corrects the symptom - output voltage offset.

I believe there are better ways to ensure optimal Vdif.

- keantoken
 
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Parameters of semiconductors with temperature changes. DC servo, PI controller deals mainly thermal stability. P-I controller knows overload amplifier.

Federmann,

It may be a language issue, but the thermal stability is not addressesd by the servo/PI, UNLESS you mean the thermal stability of the DC offset.

What normally is meant by thermal stability is the thermal stability of the output stage, which is not addressed by the servo.

What do you mean by: "P-I controller knows overload amplifier"?

jd
 
Federman, I've added part numbers to your schematic to illustrate.

Assume that Vbe(Q1)=Vbe(Q2)
Assume that Vbe(Q3)=Vbe(Q4)

Assume that for any transistor Vbe increases with Ic.

Following this, Vdif will be equal if and only if Ic(Q1)=Ic(Q2)=Ic(Q3)=Ic(Q4).

So, say Ic(Q1) is not equal to Ic(Q2), and this causes Vdif to be -2mV.

The servos will add 2mV to the base of Q2, but the base of Q1 will still be 0V.

So you see that the real problem is the Ic of the LTP's.

Ic(Q1) roughly equals Vbe(Q5)/R2.

Ic(Q3) roughly equals Vbe(Q6)/R1.

So really the only way to minimize Vdif is to:

1: Adjust R2 until Ic(Q1)=Ic(Q2)
2: Adjust R1 until Ic(Q3)=Ic(Q4)
3: repeat until both LTP's are balanced

After doing this there should be no need for a servo since, as you say, Vout is derived from Vdif.

- keantoken
153161d1262974257-influence-delay-amplifiers-listening-characteristics-hqqf-55-504_a_kmod.jpg


For precise adjustment of just R2
 
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