Schema is very simple (see attachment). In my implementation GPIOs and CLK go through digital isolator but that is not absolutely needed. MCK divider is set in register SAI_ACRx. Reference manual has all the required information.Would you have a schema for that, with typical components? Without such thing I won't be able to implement this config, and will have to go to the system clock reference from the OpenUac Bridge.
Attachments
Thats a good idea, to follow the mini dsp pinout! Then maybe some of the add on cards also could be used with both.Last time I checked, on JLCPCB, they had stm32H7 and no stm32F7. So it would ne the natural way to go. The mchstreamer-lite could be a good inspiration source for the pinouts. But I won't be able to all the functions they do. It looks like a really versatile product a reasonable price.
I understand that it is not a priority, but still:
If there are free ADC analog in pins, the H7 has a 16 bit ADC that can be downsampled to realy good SNR values. If one ore more could be exposed it would be great. (Exposing unused pins is a bonus, but I understand if you choose to save board space)
Keep it simple is my idea. Expose few digita I/O and an analog input in the NeatAmp for few simple controls, but not more. Traces routing take time. There are a lot of constraints. Less signals, less traces, less time, more chances that something is achieved
And as schematics are available, someone can get it to next level...
And as schematics are available, someone can get it to next level...
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