Keep in mind that the normal CMOS gates have about 120R of internal resistance at its outputs. And may not be simmetrical. For example, 200R source and 100R sink. N channel MOSFET has usually lower resistance. Note that it's an example only and may or not be your case. Read carefully the datasheet to stay sure.
Over it, take a minute to understand this: if you pay attention, the buck and the boost topologies are the same with interchanging between input and output. Thus if you have a large output capacitor and you switch off the power supply from primary side, momentarily it may actuate as boost from output driving voltage into the primary with no voltage control. Thus primary side may be overvoltaged during few instants. This effect is more notorious when syncronous rectification is used. The effect is in some way, similar to bus boost in half bridge class D amps.
Over it, take a minute to understand this: if you pay attention, the buck and the boost topologies are the same with interchanging between input and output. Thus if you have a large output capacitor and you switch off the power supply from primary side, momentarily it may actuate as boost from output driving voltage into the primary with no voltage control. Thus primary side may be overvoltaged during few instants. This effect is more notorious when syncronous rectification is used. The effect is in some way, similar to bus boost in half bridge class D amps.
Interesting facts, thanks!
In my case Logic gates internal resistance is not a problem, because the inputs of IR2110 have extremely high impedance.
Some mosfet drivers are also not simmetrical in source / sink, like IR2184.
IR2110 is simmetrical though, 2A / 2A.
I am planning to use another one of 4.5A / 4.5A for even higher efficency.
To calculate the gate resistances for the mosfets, of course, i'm also taking into account their gate resistance.
In my case Logic gates internal resistance is not a problem, because the inputs of IR2110 have extremely high impedance.
Some mosfet drivers are also not simmetrical in source / sink, like IR2184.
IR2110 is simmetrical though, 2A / 2A.
I am planning to use another one of 4.5A / 4.5A for even higher efficency.
To calculate the gate resistances for the mosfets, of course, i'm also taking into account their gate resistance.
Yes, i know...
Everything has to be designed carefully and all details have to be taken into account.
I tested the power part and it works very very well. Now i just need to implement the modification with the XOR gates.
I will find a way to get my hands on an oscilloscope, because it's a must in electronic design.
Based on some calculations the MOSFETs take less than 50nS to turn on / off. Thats why the switching losses are so low. With an oscilloscope, i could have measured this time more precisely.
So, for now, everything is fine in my circuit except the output voltage regulation due to the max 50% duty cycle problem. But now i'm about to solve it with those XOR gates, hopefully.
Everything has to be designed carefully and all details have to be taken into account.
I tested the power part and it works very very well. Now i just need to implement the modification with the XOR gates.
I will find a way to get my hands on an oscilloscope, because it's a must in electronic design.
Based on some calculations the MOSFETs take less than 50nS to turn on / off. Thats why the switching losses are so low. With an oscilloscope, i could have measured this time more precisely.
So, for now, everything is fine in my circuit except the output voltage regulation due to the max 50% duty cycle problem. But now i'm about to solve it with those XOR gates, hopefully.
Yep, that is actually what i do while i repair mains power supplies. There is a fuse plus a 100w Light bulb in series.
In this case its not a main power supply. Its just a synchronous buck converter with a maximum DC input voltage of 80V.
But of course i still need to be careful.
The circuit is fused, and the power supply i'm using to power the synchronous buck converter has an adjustable current limit.
Heck no i'm gonna connect prototype circuits directly to batteries!
Even if they are fused. If the current limiting feature comes into play, i wont burn the components.
Only after testing the circuit in every regard i will then be able to connect it directly to batteries. Of course ALWAYS still fused.
Never forget the fuse, or...
Short circuit will be massive.
In this case its not a main power supply. Its just a synchronous buck converter with a maximum DC input voltage of 80V.
But of course i still need to be careful.
The circuit is fused, and the power supply i'm using to power the synchronous buck converter has an adjustable current limit.
Heck no i'm gonna connect prototype circuits directly to batteries!
Even if they are fused. If the current limiting feature comes into play, i wont burn the components.
Only after testing the circuit in every regard i will then be able to connect it directly to batteries. Of course ALWAYS still fused.
Never forget the fuse, or...
Short circuit will be massive.
With 2110 (or any bootstrapped IC), a 100% duty (permanently on upper device) is not possible, as this would drain the bootstrap capacitor providing the VBS power supply, as shown in the datasheets. It is not recommended to go beyond 90% in any case, especially with high gate-charge MOSFETs.
Yes, i knew 100% is impossibile. I will limit it to 95 - 90%.
I'm using a polypropylene capacitor for bootstrapping. As far as i know, they are the best for high frequency operation. They have an extraordinarily low dissipation factor. They are even better than ceramic, i think.
Of course, bypass capacitors are in every IC, literally as close as phisically possible. They are multiplayer ceramic capacitors (SMD).
The bulk electrolithyc capacitors are 820uF 100V x3 on both input and output (Good capacitors by nippon chemi-con)
All those ensure reliable operation.
The design seems very good. Now, i am about to make the modification with the XOR gates.
I also found that the CD4070 has symmetrical source / sink currents, just in case this makes the design even better. But i dont think it matters in this case, because the inputs of the mosfet driver are very high resistance / impedance.
Since i'm making the circuit on a prototype board, i'm using DIP package ICs.
In the new PCB design they are all going to be SMD, which will improve the circuit even more.
I also noticed that i didnt add diodes in parallel of the gate resistors, so i'll add them now. It should make switching even faster.
Exsternal shottky diodes are also in parallel to the MOSFETs internal body diodes to improve efficency.
I'm using a polypropylene capacitor for bootstrapping. As far as i know, they are the best for high frequency operation. They have an extraordinarily low dissipation factor. They are even better than ceramic, i think.
Of course, bypass capacitors are in every IC, literally as close as phisically possible. They are multiplayer ceramic capacitors (SMD).
The bulk electrolithyc capacitors are 820uF 100V x3 on both input and output (Good capacitors by nippon chemi-con)
All those ensure reliable operation.
The design seems very good. Now, i am about to make the modification with the XOR gates.
I also found that the CD4070 has symmetrical source / sink currents, just in case this makes the design even better. But i dont think it matters in this case, because the inputs of the mosfet driver are very high resistance / impedance.
Since i'm making the circuit on a prototype board, i'm using DIP package ICs.
In the new PCB design they are all going to be SMD, which will improve the circuit even more.
I also noticed that i didnt add diodes in parallel of the gate resistors, so i'll add them now. It should make switching even faster.
Exsternal shottky diodes are also in parallel to the MOSFETs internal body diodes to improve efficency.