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Updating a classic: BUF634A

OPA627 will definitely win in the 1/f noise comparison. Since it has a much lower gain bandwidth, the input JFETs can be massive, improving the low frequency noise. However, all that additional input capacitance will make the input current noise rise at high frequency.

Massive is something different. I don't ask for the resurrection of the TI P8000 / P8002 FET
or an op amp with an IF3602 in the input, but a op amp with jellybean BF862 sized
inputs FETs would be a huge progress with 1.5 nV/rt Hz and acceptable 1/f corner.
SO-8 with center tab if it needs to be.

regards, Gerhard.
 
Massive is something different. I don't ask for the resurrection of the TI P8000 / P8002 FET
or an op amp with an IF3602 in the input, but a op amp with jellybean BF862 sized
inputs FETs would be a huge progress with 1.5 nV/rt Hz and acceptable 1/f corner.
SO-8 with center tab if it needs to be.

regards, Gerhard.

Unfortunately it's not as simple as just putting down a pair of really big JFETs, otherwise we or our competition would have done this a long time ago. I think if you were to look at the input JFETs of modern amplifiers (OPA140, OPA145, OPA164x, OPA827, OPA828, ADA4627, ADA4625) you'd be surprised by how large they already are. Point taken though, we are always trying to push the noise (both broadband and 1/f) on our JFET amplifiers as low as possible.
 
Comparing the two parts:

LME49600 Wide Bandwidth Mode: 180 MHz / 13.2 mA
BUF634A Wide Bandwidth Mode: 210 MHz / 8.5 mA

The advantages of the SiGe process used in the BUF634A are pretty obvious. It's made on the same process as OPA1612, OPA1642, OPA1622, OPA1692, and many others.

Funny you should ask about the audio version of OPA2156 (will be called OPA1656). I was literally sitting in the lab with the systems engineer for that part, measuring a composite amplifier made up of OPA1656 + BUF634A, when we saw your post. The OPA1656 prelim datasheet and prototype samples should be available on ti.com next week. I'll update this thread when it's online.

And don't discount the OPA2810! 100-MHz bandwidth, JFET-input, 190 V/us slew rate, with lower noise and distortion than an OPA627, and consumes only 3.6mA of supply current...

A little OT but can you consider OPA1656 as a drop-in replacement for OPA1652? I have a board designed around the 1652 and would love to get a hand on 1656. Do i need any modification to support 1656, beside the huge need for power supply current of 1656?
 
Unfortunately it's not as simple as just putting down a pair of really big JFETs, otherwise we or our competition would have done this a long time ago.

Yes, for example the 2 FETs would compete for the substrate connection for their gates,
but then the Intersil/Renesas HFA31xx transistor arrays show that SOI can be sold
at an attractive price. And usually it's enough to have one high impedance input.
I would be quite happy with a LMH6702 that had one large FET on the ni input, and the
inv input could stay bipolar. Or even should stay.

Cheers, Gerhard

edit: must stay.
 
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A little OT but can you consider OPA1656 as a drop-in replacement for OPA1652? I have a board designed around the 1652 and would love to get a hand on 1656. Do i need any modification to support 1656, beside the huge need for power supply current of 1656?

This really depends on the circuit. OPA1656 is substantially wider bandwidth than OPA1652, and it has a pole-zero pair in the open loop gain curve to boost the loop gain at audio frequencies. I guess there could be some chance that an OPA1656 might oscillate in a circuit where the OPA1652 didn't show that behavior. I'd really suggest doing a stability simulation in SPICE to verify that the circuit wouldn't oscillate.
 
Massive is something different. I don't ask for the resurrection of the TI P8000 / P8002 FET
or an op amp with an IF3602 in the input, but a op amp with jellybean BF862 sized
inputs FETs would be a huge progress with 1.5 nV/rt Hz and acceptable 1/f corner.
SO-8 with center tab if it needs to be.

regards, Gerhard.

The BF862 process is unfortunately not compatible with a regular modern linear IC process in silicon, much less in SiGe.
 
I did not propose that TI should license the BF862 from NXP or whoever
owns that zombie right now. I think we can trust in TI that they have a
JFET of their own that fits the task.

Licensing the NXP (or Toshiba, or Sanyo, for that matter) process won't help. These are not compatible with the current linear BIFET IC processes. Discrete low noise JFETs are very short (W) channel devices, therefore the channel length L can be shorter, so the discrete device takes less silicon area. The only way to define low noise JFETs in a linear BIFET IC processes is to increase the channel length L, and this costs silicon area. There is a wealth of patents about BIFET processes.

However, based on the current BIFET processes, in principle it is possible to design a JFET input (with say 1nV/rtHz) op amp. I am sure TI or AD would be happy to do the job, if you place an order of 1 million units and ready to pay the premium for the extra silicon area (look at the prices of a modern 3nV/rtHz JFET input opamp). I am not sure if such an opamp chip will fit today in a SO8 standard package.
 
Licensing the NXP (or Toshiba, or Sanyo, for that matter) process won't help. These are not compatible with the current linear BIFET IC processes. Discrete low noise JFETs are very short (W) channel devices, therefore the channel length L can be shorter, so the discrete device takes less silicon area. The only way to define low noise JFETs in a linear BIFET IC processes is to increase the channel length L, and this costs silicon area. There is a wealth of patents about BIFET processes.

However, based on the current BIFET processes, in principle it is possible to design a JFET input (with say 1nV/rtHz) op amp. I am sure TI or AD would be happy to do the job, if you place an order of 1 million units and ready to pay the premium for the extra silicon area (look at the prices of a modern 3nV/rtHz JFET input opamp). I am not sure if such an opamp chip will fit today in a SO8 standard package.

Please stop building straw men from things I have never said.

And your armchair speculations about chip sizes:
OPA140 is 1.272 mm**2, opa2140is 2.36mm**2 and OPA627 is 6.039mm**2.

and the results:

freq. opa140 opa627
10 Hz 8nV 15typ-40max
100 Hz 5.8nV 8...20
1KHz 5.1 nV 5.2....8
10KHz 4.5

the OPA627 with 6 mm**2 still fits in SOIC-8.
In that space, 5 OP140 would fit, with the space for 20 bonding pads
still available. And that SOT-23/soic8 stuff is probably pad bound or close.

If you have no better ideas than to simply parallel them, much as I did
in my 20xADA4898 amplifier that you seem to hate so much, then that
would improve the OP140 by sqrt(5) noise-wise. So don't try to tell me
it can't be done. The only question is if there are enough design-ins.

And I don't need an education on w/l. I learned that on Hewlett-Packard's
dynamic n-mos process and AEG's bipolar, back when a CDC Cyber 176
was the Spice working horse and our new VAX really allowed graphic entry
of those full custom transistors.
 

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Please stop building straw men from things I have never said.

I feel the love in the air :D. Anyways, you are not the only reading my posts, others may find them instructive.

Because you mentioned it, 5 x OPA140 (or a scaled version of it's JFET input stage, for a single op amp, that would likely fit in a SO8) will still have some 2nV/rtHz. You would still need 4 such monsters to make it to 1nV/rtHz, or the equivalent of 20 x OPA140 (or 50mm^2 of silicon, which definitely won't fit in a SOIC-8). Not to mention other issues (offset, drift, etc...) that also scale with the area and could make a simply scaled product not feasible.

I'll let you find how much would cost a 50mm^2 op OPA140 scaled op amp, if 1 x OPA140 2.5mm^2 costs $2.5 in thousands quantity.

If you have any ideas on how to integrate a lower noise JFET in an existing BIFET process, while keeping the silicon area within reasonable limits, then I am sure TI and AD would be all ears :D