In fact i have a CD MARANTZ CD5004 and the audio format seems to be RIGHT JUSTIFIED 16 bits ...
The actual DAC ( CD 5004 ) settings is RIGHT JUSTIFIED 16 bits ...
Serge
@Sergelisses
I2S is 2's complement MSB first fixed format, word length is not fixed.
The DAC used in Marantz CD5004 is the Cirrus Logic CS4392, that accepts I2S format (see the datasheet), either PCM format.
I have no idea which format was used from Marantz to connect the transport to the DAC, it depends on the setting of some pins of the DAC chip.
@ Soekris
I wonder how you can reach 24 bit accuracy with such these resistors tolerance.
As you are an engineer, you know that with 0.01% tolerance you can reach not more than 12/13 bit accuracy.
And I have not considered the thermal drift, supposing since the resistors are identical they have the same drift (but it's not so): to reach 16 bit accuracy you need 5ppm resistors or better.
Finally I have not considered also the RDSon of the 595s, that affects the accuracy.
I2S is 2's complement MSB first fixed format, word length is not fixed.
The DAC used in Marantz CD5004 is the Cirrus Logic CS4392, that accepts I2S format (see the datasheet), either PCM format.
I have no idea which format was used from Marantz to connect the transport to the DAC, it depends on the setting of some pins of the DAC chip.
@ Soekris
I wonder how you can reach 24 bit accuracy with such these resistors tolerance.
As you are an engineer, you know that with 0.01% tolerance you can reach not more than 12/13 bit accuracy.
And I have not considered the thermal drift, supposing since the resistors are identical they have the same drift (but it's not so): to reach 16 bit accuracy you need 5ppm resistors or better.
Finally I have not considered also the RDSon of the 595s, that affects the accuracy.
If you look at the CS4392 in the CD5004 the format settings is RIGHT justified 16 bits
Serge
So it's not I2S format.
If you want use the transport of the Marantz to feed Soekris's Dac you have to use S/PDIF (I see the Marantz provides optical and coaxial digital output).
As an alternative, you can get I2S signal directly from the decoder chip TC94A70FG inside the device.
You might want to read though the whole thread, some of my posts contain more tech info, see t.ex. post #34 and #67:
http://www.diyaudio.com/forums/vend...n-magnitude-24-bit-384-khz-4.html#post3999660
http://www.diyaudio.com/forums/vend...n-magnitude-24-bit-384-khz-7.html#post4000703
Also with sign magnitude format, 33R RDSon means 7-8 bit accuracy, not 12 bit.
Am I wrong?
Yes, you're wrong. As I said in post #34, there has been compensated for the driver output impedance, which btw is ~13R.
And please read up on Sign Magnitude DAC principles....
Can you please explain, for I have quite a different idea about the resolution of a R2R ladder network.
If you would state that the accuracy of the first step in the ladder is in the 12/13 bit region, I'd understand. But the ladder contains over 24 steps which divide the previous step with 0.01% to 0.1% accuracy, depending on the version. And for every step in the ladder this accuracy applies. Actually I don't see the problem.
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But the same accuracy is not sufficient when bit resolution increases. While in the 8 bit region you can reach 8 bit accuracy with resistors matched to a little less than 1%, you cannot apply the same accuracy when you increase the resolution, for example, to 16 bit.
If this was true, you could start from a 2 bit DAC, where 2 bit accuracy can easily reached with resistor matched to 50% and apply this accuracy for every higher bit resolution. So you could build a 32 bit DAC with resistors matched to 50%.
It's not so easy.
For a R2R ladder DAC in 2's complement format with 24 bit accuracy, you need resistors matched to 0.00001 percent (1 / 2^24).
For a 24 bit signed magnitude DAC you need two sections with 23 bit accuracy, so resistors have to be matched to 0.00002 percent (1 / 2^23).
That's what I understood about sign magnitude DAC principles, but if I'm wrong I'm pretty glad to understand (mathematically speaking).
That's the reason I abandoned the idea of build a R2R DAC several years ago.
My conclusion was I need a 6 1/2 DMM with 0.002% accuracy to match resistors and a bag of resistors, to build a 16 bit resolution discrete DAC.
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With a regular R-2R DAC you have the MSB switching at zero crossing, even with t.ex. a -60db signal. That mean that the THD is absolute so if you have -90 db THD at 0 db signal then you have -30 db THD relative to a -60 db signal.
That's why a regular R-2R DAC need to be very precise.
With a Sign Magnitude DAC it's like a sliding window as the MSB are NOT switching with lower level signals, so if you have -90 db THD at 0 db you will still have -90 db relative at to -60 db signal....
That's why my prototype get 0.006% THD at 0 db, even with just the 0.05% resistors on the prototype, and still get 0.027% at -60 db, which are probably from the measuring ADC anyway....
I'm afraid your math is a bit off...
first, we're not talking about 50% resistors, however rather inaccurate 5% resistors would support the experiment, to determine the accuracy of the steps of the ladder, fine.
We're talking about very accurate resistors, who's inaccuracy starts at the 12th bit beneath the intended level of the divider they form. The next (lower) bit has the same (in)accuracy, so the actual inaccuracy of the lowest bit will be less than the initial inaccuracy for the resistors are in parallel. Still the inaccuracy of the level of the second bit of the divider will not deviate more than the initial accuracy from the intended voltage. actually it's deviance will be in the order of 0.7 (1/sqrt(2) ) of the maximal deviance. Next bit would show us a deviance in the order of 1/sqrt(3) of the max. deviance. So accuracy actually increases with the number of bits.
Since it is a divider, the total deviance of each step will never exceed the initial deviance of the resistors used, since the deviance of the output voltage of the divider-step is also determined in % of a voltage and not in a voltage.
even if the resistors were ordered in a serial way (r-r) and selected to match the exact voltage steps (2^24 !), inaccuracy of the output would never exceed the initial inaccuracy of the resistors used.
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Thanks Esgigt,
I love it when an independent expert explains the facts in a clear and logical way...One expert opinion is more valuable than a hundred well intentioned but ill informed opinions.
I think this project is absolutely fantastic and soekris has done us all a great favour bringing this to the DIY market.... Thanks!
All the best
Derek.
I love it when an independent expert explains the facts in a clear and logical way...One expert opinion is more valuable than a hundred well intentioned but ill informed opinions.
I think this project is absolutely fantastic and soekris has done us all a great favour bringing this to the DIY market.... Thanks!
All the best
Derek.
You're welcome...
Perhaps I should consider a career change and go into politics
So it's not I2S format.
no ...really You have to use S/PDIF
bad ideayou can get I2S signal directly from the decoder chip TC94A70FG inside the device
what is the difference between directly from the TCA94A070 and on the actual connector ( to the DAC ) ?Serge
In a conventional R2R ladder DAC (2's complement format) the required accuracy doubles with each additional bit.
I believe you have to read a little. The following link could be useful:
Resistor ladder - Wikipedia, the free encyclopedia
http://www.diyaudio.com/forums/digi...-ladder-dac-serial-data-demultiplexing-2.html