What are the inputs pins at Cronus for D1 D2 and DCK at Hermes header?
Pin 1 DCK
Pin 3 D1
Pin 5 D2
I guess output pins at Cronus for D1 D2 and DCK at B3 header, only to be sure are the same like input?
Pin 1 DCK
Pin 3 D1
Pin 5 D2
Pin 1 DCK
Pin 3 D1
Pin 5 D2
I guess output pins at Cronus for D1 D2 and DCK at B3 header, only to be sure are the same like input?
Pin 1 DCK
Pin 3 D1
Pin 5 D2
Attachments
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![IMG_20190922_184725~2[1].jpg](/community/data/attachments/722/722067-78fabfffe2b95e9de99334571d866fe8.jpg)
X1...
X1 position should be the base 44.1 XO, not the faster one.
Jumper positions depend on the XO frequency and what XO frequency your source needs.
X1 position should be the base 44.1 XO, not the faster one.
Jumper positions depend on the XO frequency and what XO frequency your source needs.
Why...
Would you want to do that? The onboard regulator was specially chosen for its low output impedance and low noise. Add that to the fact that it is very close, circuit trace wise, to the position of the oscillator(s) and it is doubtful that an external supply of any type could give any advantage.
If you are using it only for DSD, here is a tip, this only works if you are using only 44.1 base frequency DSD, meaning: 2.8224, 5,6448, 11.2896, etc... Mount only the single clock in X1, and then jump the two clock positions with a short u.fl cable. This way the DAC has only a single beating oscillator to deal with, and the power supply is only modulated by a single beating oscillator. I use this approach with both of my DACs which only use DSD input.
When I asked what the source was I meant the digital source: Amanero, BBB, etc. For Amanero it requires low frequency clocks: since you are using a NoDac approach I am assuming the "DAC" does not require master clock, only bit clock and the R and L DSD data, right? If so, mount a single 22.5792 clock (I prefer NDK SDA series with .01 uF bypass on the Rhea board) to have the lowest phase noise (unless you have a Pulsar clock around) and set the clock divider at 1:1 for Amanero. I do not know what rate the BBB requires if you are using that.
Would you want to do that? The onboard regulator was specially chosen for its low output impedance and low noise. Add that to the fact that it is very close, circuit trace wise, to the position of the oscillator(s) and it is doubtful that an external supply of any type could give any advantage.
If you are using it only for DSD, here is a tip, this only works if you are using only 44.1 base frequency DSD, meaning: 2.8224, 5,6448, 11.2896, etc... Mount only the single clock in X1, and then jump the two clock positions with a short u.fl cable. This way the DAC has only a single beating oscillator to deal with, and the power supply is only modulated by a single beating oscillator. I use this approach with both of my DACs which only use DSD input.
When I asked what the source was I meant the digital source: Amanero, BBB, etc. For Amanero it requires low frequency clocks: since you are using a NoDac approach I am assuming the "DAC" does not require master clock, only bit clock and the R and L DSD data, right? If so, mount a single 22.5792 clock (I prefer NDK SDA series with .01 uF bypass on the Rhea board) to have the lowest phase noise (unless you have a Pulsar clock around) and set the clock divider at 1:1 for Amanero. I do not know what rate the BBB requires if you are using that.
That's very good information. Mine digital source is Amanero. Do you have a picture how to jump the two clock positions with a short u.fl cable? One clock it's only to max. DSD256? It's only OK to convert DSD for PCM 44.1?
Could post the pic showing where is installed the .01 uF bypass on the Rhea board? Also I use NDK SDA oscillators.
I asked for external power because I will use DIYIHK USB-I2S isolator: can accept 5V as Cronus but possible works better wit 3.3V, that's the reason I asked.
noDac don't requires bit clock, only R & L.
TIA
Felipe
Could post the pic showing where is installed the .01 uF bypass on the Rhea board? Also I use NDK SDA oscillators.
I asked for external power because I will use DIYIHK USB-I2S isolator: can accept 5V as Cronus but possible works better wit 3.3V, that's the reason I asked.
noDac don't requires bit clock, only R & L.
TIA
Felipe
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Felipe, I use a Salas 5V shunt regulator for the Cronos board. Last year I had a plan to circumvent the onboard regulator and just for fun try to power Cronos directly with a LiFePO4 3.3V battery power supply. But I did not follow through on that.
But I asked Brian about it and he wrote
"I suppose you could do that, but I don't think there would be any benefit. The ADM7150 is 1uV noise. I think you would need to remove the onboard regulator, which is tricky since it has a power pad (soldered) under the chip"
/ Micke
But I asked Brian about it and he wrote
"I suppose you could do that, but I don't think there would be any benefit. The ADM7150 is 1uV noise. I think you would need to remove the onboard regulator, which is tricky since it has a power pad (soldered) under the chip"
/ Micke
Sorry, no pics! There are two u.fl micro bnc jacks right next to the clock positions on the Cronus board, just jump those with the shortest u.fl cable you can get your hands on.
Then you can play all DSD rates as high as you want (512, 1024, etc...) you need the jump just so Amanero will see a clock signal for the other rates. By the way, thanks to Brian from TPA for suggesting the clock jump solution.
the position for the bypass capacitor on the Rhea board is obvious, it is right on top (marked C1). I used a .01 uF, C0G here as the NDK data sheet suggests a final .01 uF bypass for the SDA oscillators.
I do not understand why you would use the DIYINHK isolator in concert with the Cronus? Cronus/Hermes/Amanero already provides isolation. This seems very redundant to me, although I do have a super clean USB signal coming from my Sonore Signature Rendu SEoptical!
Then you can play all DSD rates as high as you want (512, 1024, etc...) you need the jump just so Amanero will see a clock signal for the other rates. By the way, thanks to Brian from TPA for suggesting the clock jump solution.
the position for the bypass capacitor on the Rhea board is obvious, it is right on top (marked C1). I used a .01 uF, C0G here as the NDK data sheet suggests a final .01 uF bypass for the SDA oscillators.
I do not understand why you would use the DIYINHK isolator in concert with the Cronus? Cronus/Hermes/Amanero already provides isolation. This seems very redundant to me, although I do have a super clean USB signal coming from my Sonore Signature Rendu SEoptical!
The single oscillator for DSD will also work with PCM: 44.1, 88.2, 176.4, and further multiples. It will play with 48, 96, 192 etc, but of course the music will be slowed down a bit!
As you were saying this is NoDAC, I figured I would suggest the single clock rate, as it may offer better performance having only a single beating frequency in a DAC. I use this approach with both my ESS 9038 buffaloPRO and my DSC-2 I am building. For both DACs I oversample all files to DSD 256 or 512 in the server far away (another room) from the audio system.
As you were saying this is NoDAC, I figured I would suggest the single clock rate, as it may offer better performance having only a single beating frequency in a DAC. I use this approach with both my ESS 9038 buffaloPRO and my DSC-2 I am building. For both DACs I oversample all files to DSD 256 or 512 in the server far away (another room) from the audio system.
![IMG_20190922_184725_2[1] jumper clock.jpg](/community/data/attachments/723/723155-2160775015d4108069ee2bb108a6f293.jpg)
![IMG_20190922_184725_2[1] jumper clock & bypass cap.jpg](/community/data/attachments/723/723170-b59214e8cab8a9019874e11441146f8e.jpg)