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Old 19th November 2019, 07:52 PM   #11
baudouin0 is offline baudouin0
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OK its not quite that simple. The FET must not end up having a voltage on the source of less than -300mV or the gate source will conduct and the circuit goes non linear.

Tried with 2SK170 in LT spice gives +300mV on source and works fine.

Hope this helps.
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Last edited by baudouin0; 19th November 2019 at 08:12 PM.
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Old 19th November 2019, 08:39 PM   #12
cygnus x1 is offline cygnus x1  United States
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Thank you very much for the LT spice analysis. Seems I'll go with 2SK170 for the cc.

Anyone have a clue what Q5 is...or could be?
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Old 19th November 2019, 08:46 PM   #13
analog_sa is offline analog_sa  Europe
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For some reason the sim does not provide separate source resistors and this is the reason the bias voltage differs from the 190mV shown in the circuit.
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Old 19th November 2019, 08:51 PM   #14
analog_sa is offline analog_sa  Europe
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Quote:
Originally Posted by baudouin0 View Post
So there is 200v across 50k
No. There is also current passing through the 10k which reduces the drain voltage.
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Old 19th November 2019, 09:01 PM   #15
baudouin0 is offline baudouin0
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Quote:
Originally Posted by analog_sa View Post
For some reason the sim does not provide separate source resistors and this is the reason the bias voltage differs from the 190mV shown in the circuit.
Sorry copying error - does not affect the voltage on source as the current through each leg is still the same but does increase the gain.
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Old 19th November 2019, 09:02 PM   #16
baudouin0 is offline baudouin0
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Quote:
Originally Posted by analog_sa View Post
No. There is also current passing through the 10k which reduces the drain voltage.
Yep sorry 5.5ma through tail gives 12v on drain.

Q5 not critical as long as vgs is low so output does not clip at low voltage and vgs does not forward conduct opposite of 2SK170 may do.

Screenshot from 2019-11-19 21-10-51.png

Last edited by baudouin0; 19th November 2019 at 09:17 PM.
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Old 20th November 2019, 03:29 PM   #17
cygnus x1 is offline cygnus x1  United States
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I'll give the 2N5460 a try. I don't have any sim software, but from the data sheets, looks like the 2SJ74 (compliment of 2SK170) could work? A lot quieter.

All the help has been awesome!
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Old 20th November 2019, 04:49 PM   #18
baudouin0 is offline baudouin0
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Yep should do - there's plenty of gain at the front so the noise figure is not so important for the P-FET.

The 2SK170 will always work as the Drain current from spec:

IDSS(Note)VDS= 10 V, VGS= 0 2.6 ⎯20mA

Min value of 2.6ma > 5.5ma tail current / 4 = 1.375ma. Which means VGS will be negative. You will need 4 accurately matched ones.
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Old 20th November 2019, 05:18 PM   #19
analog_sa is offline analog_sa  Europe
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Quote:
Originally Posted by baudouin0 View Post
Yep sorry 5.5ma through tail gives 12v on drain.

The biasing is still wrong. The CCS should be connected to a negative voltage instead of ground.
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Old 20th November 2019, 05:53 PM   #20
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Quote:
Originally Posted by analog_sa View Post
The biasing is still wrong. The CCS should be connected to a negative voltage instead of ground.
Does not matter in simulation as the CCS can generate energy. In practise you are correct and if replaced with MOSFET that would necessary in simulation.
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