A further few questions if I may:
What is the preferred input to output voltage 'overhead'?
For example, what is the required input voltage to get a required output of say 15V?
Would the regulator be compromised if it was fed an existing DC voltage emanating from a 'Smoothed' DC voltage from a LM317 voltage regulator (from a separate enclosure/box)?
TIA
What is the preferred input to output voltage 'overhead'?
For example, what is the required input voltage to get a required output of say 15V?
Would the regulator be compromised if it was fed an existing DC voltage emanating from a 'Smoothed' DC voltage from a LM317 voltage regulator (from a separate enclosure/box)?
TIA
You must consider the level of ripple on the input voltage. Make sure that the minimum input value (the 'through') of the ripple leaves enough voltage for the regulator to work, lets say minimum 1V.
Remember that mains voltage can vary 10% so if you set the headroom too low, it may drop out of regulation at low mains.
On the other hand, if you have too much headroom, it will heat up the regulator unnecessarily. For instance, with an output current of 150mA and a headroom of 5V the pass device will dissipate 0.15 x 5 = 750mW, which is OK. With 0.5A and 15V headroom it is 7.5W which you probably don't want!
If you feed the reg with smoothed voltage there is much less variation and ripple so you can set the dropout a bit tighter.
In all these cases you must do some experiments and measurements on several times of the day if you use non-stabilised input voltage.
Jan
I'm using an old rectifier from a previous project to supply the SR. I'm getting +20.3V and -20.3V from it and into the SR. My SR outputs are good individually; I'm getting 12.14V (between +Vout and +return) and -12.18V (between -Vout and -return) but there's 16.2V between the +return and -return. That's not good since I'm trying to use the SR in a +12V,0,-12V application. I measured the voltage between the +GND and -GND from the rectifier output and am getting 16.2V as well.
Is this the problem? I need a rectifier that supplies the SR with +return and -return inputs that are at the same potential in order to get my SR return outputs at the same potential (0V referenced between +Vout and -Vout)?
Is this the problem? I need a rectifier that supplies the SR with +return and -return inputs that are at the same potential in order to get my SR return outputs at the same potential (0V referenced between +Vout and -Vout)?
Well you need to interconnect the two supplies at one point, to get +/-12V, right? If you connect +return and -return and call it 'ground' you have +12, gnd and -12.
You did supply each regulator from an isolated secondary on the xformer? If you have only one xformer/rectifier this won't work of course.
See the drawings in my article on the diyaudio store. I spend a lot of time to make this as clear as possible. Please read it.
Jan
You did supply each regulator from an isolated secondary on the xformer? If you have only one xformer/rectifier this won't work of course.
See the drawings in my article on the diyaudio store. I spend a lot of time to make this as clear as possible. Please read it.
Jan
I liked my +/-12V super regulator so much that I built a +24V/GND version with one positive board. I followed the recommendations for changing components, but am only getting half the desired voltage output. I have the following components:
R5=8.25K
R6=2K
R7=4.99K
D2=12V Zener diode, NZX12X
D5=LM329
D3,D4=1N4148
Q1=44H11
Q2=BC556BP
Test Readings with Pos out and Return jumpered to each of their sensing terminals:
Pos out measured to Pos return: 12.4V
DC GND measured to each side of the following components:
R1: 33.9V, 31.9V
R3: 1.18V, 1.1V
D2: 1.18V, 13V
D3: 7.86V, 7.26
D4: 7.86, 7.26
R4: 7.27V, 6.96V
R16: 12.27V, 12.49V
R5: 6.96V, 12.5V
R7: 7.86V, 0V
R6: 7.86V, 12.28V
Any ideas on what might be wrong to get a +24V and GND output? Thanks in advanced for any help.
R5=8.25K
R6=2K
R7=4.99K
D2=12V Zener diode, NZX12X
D5=LM329
D3,D4=1N4148
Q1=44H11
Q2=BC556BP
Test Readings with Pos out and Return jumpered to each of their sensing terminals:
Pos out measured to Pos return: 12.4V
DC GND measured to each side of the following components:
R1: 33.9V, 31.9V
R3: 1.18V, 1.1V
D2: 1.18V, 13V
D3: 7.86V, 7.26
D4: 7.86, 7.26
R4: 7.27V, 6.96V
R16: 12.27V, 12.49V
R5: 6.96V, 12.5V
R7: 7.86V, 0V
R6: 7.86V, 12.28V
Any ideas on what might be wrong to get a +24V and GND output? Thanks in advanced for any help.
Contrary to popular belief, I don't have a photographic copy of the circuit in my head. ;-)
A few hints: see if the two opamp inputs are the same voltage. If not, try to reason why. For instance, the +inp should be at the reference, around 6.9V. If the -inp is at the same value (within a few mV), and the opamp output is within its output range, the regulator is working correctly and there is an error with the two feedback resistor values at the -inp.
If the opamp output is slammed all the way up, it is trying to raise the output but not succeeding. Reason could be that the input voltage is too low, or a problem with the pass transistor type/orientation. Or your zener in series with the opamp output is the wrong way around.
Jan
A few hints: see if the two opamp inputs are the same voltage. If not, try to reason why. For instance, the +inp should be at the reference, around 6.9V. If the -inp is at the same value (within a few mV), and the opamp output is within its output range, the regulator is working correctly and there is an error with the two feedback resistor values at the -inp.
If the opamp output is slammed all the way up, it is trying to raise the output but not succeeding. Reason could be that the input voltage is too low, or a problem with the pass transistor type/orientation. Or your zener in series with the opamp output is the wrong way around.
Jan
Assuming D2 is in series with output of opamp, and the opamp output is at 1.18V, the regulator seemd to work OK, but there's an issue with the pass transistor or the input voltage. The opamp tries to pull base current to increase Vout, but can't go lower than 1.18V. Just an educated guess.
And again, measurements at the opamp pins and the pass transistor pins are much more telling.
Jan
And again, measurements at the opamp pins and the pass transistor pins are much more telling.
Jan
D2 Zener diode is in series and has the correct orientation. Picture of the board is attached below. I took the following measurements with a 34.2V board input. All measurements are referenced to POS return:
U1 - IN: 7.86V
U1 + IN: 7.25V
U1 out: 1.11V
Q1 E: 12.5V
Q1 B: 13.1V
Q1 C: 34.1V
Q2 C: 13.1V
Q2 E: 32.0V
Q2 B: 31.4V
I also took a few more measurements with different input voltages. The super reg output stayed constant at 12.5V. Unfortunately, I took the wrong reading for the non inverted opamp input-so I don't have it-but here is the rest.
32.7V input:
U1 - IN: 7.86V
U1 + IN: ??? (I can go back into work and measure if needed)
U1 out: 1.1V
Q1 E: 12.5V
Q1 B: 13.4V
Q1 C: 32.6V
Q2 C: 13.1V
Q2 E: 30.1V
Q2 B: 30.0V
28.0V input:
U1 - IN: 7.86V
U1 + IN: ??? (I can go back into work and measure if needed)
U1 out: 1.1V
Q1 E: 12.5V
Q1 B: 13.1V
Q1 C: 28.2V
Q2 C: 13.0V
Q2 E: 26.3V
Q2 B: 25.7V
25.4V input:
U1 - IN: 7.86V
U1 + IN: ??? (I can go back into work and measure if needed)
U1 out: 1.1V
Q1 E: 12.5V
Q1 B: 13.1V
Q1 C: 25.4V
Q2 C: 13.0V
Q2 E: 23.6V
Q2 B: 23.0V
From your last post, I guess having over 600mV difference in opamp input is not good. Since I increased R5 from 4.99k to 8.25k(to keep D5's forward current=2mA) and R6/7 from 1k each, to 2k and 4.99k respectively; maybe these increased resistances are the issue? If so, I could lower the R6/7 divider to something like 1k and 2.5k, but not sure what to do about R5. Do you think changing the resistors is the right place to start? Thanks again for all the help!
U1 - IN: 7.86V
U1 + IN: 7.25V
U1 out: 1.11V
Q1 E: 12.5V
Q1 B: 13.1V
Q1 C: 34.1V
Q2 C: 13.1V
Q2 E: 32.0V
Q2 B: 31.4V
I also took a few more measurements with different input voltages. The super reg output stayed constant at 12.5V. Unfortunately, I took the wrong reading for the non inverted opamp input-so I don't have it-but here is the rest.
32.7V input:
U1 - IN: 7.86V
U1 + IN: ??? (I can go back into work and measure if needed)
U1 out: 1.1V
Q1 E: 12.5V
Q1 B: 13.4V
Q1 C: 32.6V
Q2 C: 13.1V
Q2 E: 30.1V
Q2 B: 30.0V
28.0V input:
U1 - IN: 7.86V
U1 + IN: ??? (I can go back into work and measure if needed)
U1 out: 1.1V
Q1 E: 12.5V
Q1 B: 13.1V
Q1 C: 28.2V
Q2 C: 13.0V
Q2 E: 26.3V
Q2 B: 25.7V
25.4V input:
U1 - IN: 7.86V
U1 + IN: ??? (I can go back into work and measure if needed)
U1 out: 1.1V
Q1 E: 12.5V
Q1 B: 13.1V
Q1 C: 25.4V
Q2 C: 13.0V
Q2 E: 23.6V
Q2 B: 23.0V
From your last post, I guess having over 600mV difference in opamp input is not good. Since I increased R5 from 4.99k to 8.25k(to keep D5's forward current=2mA) and R6/7 from 1k each, to 2k and 4.99k respectively; maybe these increased resistances are the issue? If so, I could lower the R6/7 divider to something like 1k and 2.5k, but not sure what to do about R5. Do you think changing the resistors is the right place to start? Thanks again for all the help!
Attachments
U1 - IN: 7.86V
U1 + IN: 7.25V
U1 out: 1.11V
So the output voltage divided down by the two resistors comes out to 7.86. Because that's higher than 7.25, the output of the opamp is slammed to ground.
You have an issue with those two resistors that divide down the Vout to -inp. The ratio should be (24-6.9) on top and 6.9 at the bottom. Check that.
Jan
U1 + IN: 7.25V
U1 out: 1.11V
So the output voltage divided down by the two resistors comes out to 7.86. Because that's higher than 7.25, the output of the opamp is slammed to ground.
You have an issue with those two resistors that divide down the Vout to -inp. The ratio should be (24-6.9) on top and 6.9 at the bottom. Check that.
Jan
Of course! I had R6/7 reversed. I had the right values to give 24V (2K and 4.99K), just stuffed on the board wrong. I swapped them and now have 24.5V steady output.
Mr. Didden, thanks again for all the help! If I every make it back to Belgium, I owe you a beer or two. Maybe an Orval or Rochefort 10? My favorites.
Mr. Didden, thanks again for all the help! If I every make it back to Belgium, I owe you a beer or two. Maybe an Orval or Rochefort 10? My favorites.
Beer is good ;-)
But seriously, these regulators are a simple circuit. You only need to know ohm's law and opamps. 99.9% of the issues can be diagnosed easily from looking at the opamp inputs and output.
If the -inp is higher than the +inp and Vo is too low, there's a problem with the feedback divider. It is that feedback divider that sets Vo, everything else is secondary. The only thing the opamp does is move its output to try to make -inp and +inp equal; it has no idea what a 'regulator' is. So if the opamp output is slammed to gnd or Vo, it is trying but not getting there.
Jan
But seriously, these regulators are a simple circuit. You only need to know ohm's law and opamps. 99.9% of the issues can be diagnosed easily from looking at the opamp inputs and output.
If the -inp is higher than the +inp and Vo is too low, there's a problem with the feedback divider. It is that feedback divider that sets Vo, everything else is secondary. The only thing the opamp does is move its output to try to make -inp and +inp equal; it has no idea what a 'regulator' is. So if the opamp output is slammed to gnd or Vo, it is trying but not getting there.
Jan
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Managed to finish the last 60 Pages or so, must admit that, Jan, you really have my respect, for repeating the same contents over the years, again and again...
Back to the topic.
Just read Erno Borbelys latest All Fet Super Reg, it seems that Mr. Borbely basically made an error amp out of Jfets, the rest is pretty the same as other Shunt regs.
It occured to me that, why not just build a single stage error amp？ So heres some crude simulation in LTSpice:
View attachment Regulator.asc
PSRR in HF seems okay, but strange phase shift?
Point in using a single stage error amp is to minimize noise in this part, since one can use bjts with low Rbe to achieve even lower noise than ops like ad797, IMO....
Back to the topic.
Just read Erno Borbelys latest All Fet Super Reg, it seems that Mr. Borbely basically made an error amp out of Jfets, the rest is pretty the same as other Shunt regs.
It occured to me that, why not just build a single stage error amp？ So heres some crude simulation in LTSpice:
View attachment Regulator.asc
PSRR in HF seems okay, but strange phase shift?
Point in using a single stage error amp is to minimize noise in this part, since one can use bjts with low Rbe to achieve even lower noise than ops like ad797, IMO....
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Output impedance is inversely proportional to error amplifier gain. To get SuperRegulator class output impedance you need LOTS of error amplifier gain. Among your design choices are (a) use an error amplifier topology with two gain stages; (b) duplicate the 140 dB gain that Scott Wurcer got from a single gain stage {folded cascode} using monolithic matching tricks; (c) positive feedback.
Oops, getting 140dB of gain with discrete elements sounds pretty impossible, not to mention that most Op-Amps have OLG lower than 130dB...So the ad797 stays the best error amp for a SuperReg?
