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Old 12th January 2021, 03:41 PM   #101
BesPav is offline BesPav  Russian Federation
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Originally Posted by Hans Polak View Post
First of all, a conditionally stable amp is the last thing we want, donít we ?
Noninverting unconditionally stable amp mostly anyway have different source resistances seen from its inputs. Now, just think, do it have equal voltage drop caused by input bias current? Do this drop equal to differential and common mode? Do this drop are equal through working signal voltage swing? Do this drop are equat through input common-mode range?

So, what amp do you want now?

Have no doubt, i'll prefer to keep amp inside known stability conditions and have +60 dB feedback handicap than use unconditionally stable miller-compensated first-order one.

Last edited by BesPav; 12th January 2021 at 03:44 PM.
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Old 12th January 2021, 05:30 PM   #102
stinius is offline stinius
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Originally Posted by SSassen View Post
I run the amplifier in balanced mode, which really is a requirement for me.

Your AC input source, is it floating? or does it have a ground reference?
Ignorance is bliss
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Old 13th January 2021, 11:37 AM   #103
Ultima Thule is offline Ultima Thule  Europe
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Default Regarding Output Stage Protection Circuit

I might be wrong and I don't have access to any simulator to check it, but here's how I see it, the protection circuit for the output FET stage doesn't work as one might think, those 2 transistors Q15, Q16, and 2 diodes D3, D4, supposed to sense the voltage fall over the source resistors at 0,1 Ohm in the occurrence of a short at the output do nothing, or, almost nothing, because as we will soon see they do "protect" but in a peculiar way.

The lower side of the Vbe multiplier circuit, which is biasing the output stage, is during positive cycle clamped to the output through lower over current protection transistors collector-base diode + lower diode + source-R (Q16 + D4 + R26).

And vice-verse during negative output voltage cycle, the higher side of the Vbe multiplier circuit is clamped to the output through the upper transistors collector-base diode + upper diode + source-R (Q15 + D3 + R24), hence these two transistors do not act on the voltage fall over output FET source resistors more than two passive diodes via their base-collector diode.

And the reason the output clips harder for positive cycle is because the N-ch FET's have lower Vgs threshold than P-ch FET's, in any case the Vgs drive is always so low due to the clamping that the output FET's becomes self limiting without any protection circuit.

To make the output protection circuit (consisting of Q15, Q16, D3 and D4) engage during a short, we would need at the very least some 0,6 Volt voltage fall for each of ALL 4 devices (Q15, Q16, D3 and D4), ie. 2,4 Volt, and 2,4V over R24 alone equals to 24 Ampere for one output device, which doesn't happen due to the clamping effect explained above, ie. the protection circuit doesn't work as expected.
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Last edited by Ultima Thule; 13th January 2021 at 11:57 AM.
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Old 14th January 2021, 07:22 AM   #104
Mooly is offline Mooly  United Kingdom
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Simplicity and elegance, feedback wanted!


All your posts that are unrelated to this thread have been split off to here:

Musings on amp design... a thread split.

If you wish a different title then please report post #1 of the new thread and say what you want it to be called.

Please in future do not hijack and drag other established threads off topic as you have this one.
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Old 15th January 2021, 10:57 PM   #105
MarsBravo is offline MarsBravo  Netherlands
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Originally Posted by SSassen View Post
Thanks! But these simulations fall apart when I run the amplifier in balanced mode, which really is a requirement for me.
SSassen, can you draw a rough sketch block diagram of your final 'balanced mode' application? I'm busy with a balanced bridge Hiraga with an unbalanced input, hence this question.

Good split Mooly!
Y/Yo=(1-X/Xo)exp2 <> Y/Yo=(e)exp(X/Xo){Xo=kT/q}
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