|
Home | Forums | Rules | Articles | diyAudio Store | Blogs | Gallery | Wiki | Register | Donations | FAQ | Calendar | Search | Today's Posts | Mark Forums Read | Search |
Solid State Talk all about solid state amplification. |
|
Please consider donating to help us continue to serve you.
Ads on/off / Custom Title / More PMs / More album space / Advanced printing & mass image saving |
![]() |
|
Thread Tools | Search this Thread |
![]() |
#1 |
diyAudio Member
Join Date: Jun 2004
Location: Paris
|
![]()
Why don't consider a CFP like an emitter follower were the first transistor set up the voltage and the second supply the current needed by the load. In this case the "timing" is correct assuming that the second transitor suck_out the current need by the base of the second BJT to the collector of the first one. Is it clear ? I need help to convert Microcap schematics to jpg or gif files.
__________________
Richard Perez |
![]() |
![]() |
#2 |
diyAudio Member
Join Date: Jun 2004
Location: Paris
|
With a schematic, it will be clearer.
What i would say, by "timing" is that for me it doesn't look like feedback, but maybe i am wrong ?
__________________
Richard Perez |
![]() |
![]() |
#3 |
diyAudio Member
Join Date: Jun 2004
Location: Paris
|
Sorry , i am not yet "fluently" in this forum, so i hope this time the shematic will be here !
An externally hosted image should be here but it no longer works. Please upload images instead of linking to them to prevent this.
__________________
Richard Perez |
![]() |
![]() |
#4 | |
diyAudio Member
Join Date: Apr 2002
Location: Prague
|
![]() Quote:
Or push printscreen and paste to painbrush. |
|
![]() |
![]() |
#5 |
Banned
Join Date: Feb 2002
Location: As far from the NOSsers as possible
|
![]()
I'm all ears.
Jocko |
![]() |
![]() |
#6 |
diyAudio Member
Join Date: Jun 2004
Location: Paris
|
Thanks PMA, for schematics coversion.
The question about CFP is that this configuration is very linear and except "degeneration" in R1, i don't understand why this is called Complementary FEEDBACK Pair ? But maybe i am wrong and i would like more explanations. Even in the case of it will be true, i don' think that this "feedback" pair has the drawbacks associated with feedback, to the fidelity of the reproduced sound. Has anyone tested (listen), this configuration (input, VAS,output)?
__________________
Richard Perez |
![]() |
![]() |
#7 | |
R.I.P.
Join Date: Nov 2003
Location: Brighton UK
|
Quote:
The two transistors are in a very tight feedback loop, the "amplified" output of Q1 across R1 drives Q2s base, Q2s output being the reference for Q1 input, so 100% feedback. This sort of feedback is known as "local" feedback and should not be confused with feedback loops. R1 does not "degenerate" Q1 or Q2. R1s current is only approximately constant in that its wired across Q2s base emitter. ![]() |
|
![]() |
![]() |
#8 |
diyAudio Member
|
These are my thoughts :
CFP behaves in different ways depending on how it's driven : - If it's driven from a current source or voltage source connected between Q1:B and Q1:E then it works as an open loop circuit - If it's driven from a current source connected between Q1:B and the other side of Rload then it works also as an open loop circuit - If it's driven from a voltage source connected between Q1:B and the other side of Rload then it works as a closed loop circuit with current feedback The lower the drive impedance the more feedback it has, and when driven from high impedances [like the output of a VAS at audio frequencies] it behaves just like an obfuscated darlington but with much worse turn-off characteristics than an actual darlington [bigger current tail and phase shift at high frequencies so it's prone to blown devices and parasitistic oscillation] |
![]() |
![]() |
#9 |
diyAudio Member
Join Date: Jun 2004
Location: Paris
|
Muchas gracias Eva por las esplicaciones.
I Will continue in English for others people interested in this forum . Could you tell me more : - About the turn-off time, why ?, and is it really a problem for audio amplification ? about wich magnitude vs darlington. - Even in the case when driven by a low impedance source the collector of Q2 act immediately before the base of Q2 (for me feedback is a problem at the moment where you have a delay, when you "compare" input signal and output (no ?). - I would like more explanations about phase shift and parasitic oscillations. I am really interested in working with this circuit, and i didn't find a lot of literature on it, even D. Self (like suggested by sreten)don't explain very much in detail this configuration. For the moment in simulation it works nice, but real world is "crual" especially in audio ! I would learn more on it, before design the complete circuit, so if people has worked on it, tested, listen, they are welcome.
__________________
Richard Perez |
![]() |
![]() |
#10 |
diyAudio Member
|
Bipolar transistors are not ideal switching devices. If you abruptly increase Ib, there will be some delay [100s of nanoseconds] before Ic starts to increase and it will take up to some microseconds to reach its steady state value
Also, when there is an Ic and an Ib flowing in steady state, if Ib is abruptly removed, there will be a delay in the order of 1-10uS before Ic starts to decrease and it will take some more microseconds to fall completely These timings are orientative numbers for power bipolar transistors In a CFP, the 'current boost' transistor suffers from all those delays and thus the current it provides may be more than 180º out of phase from the driving signal at high frequencies. This causes cross-conduction and unstability problems Turn-off times and delays may be dramatically reduced by providing a negative base current to the power device at turn-off [for switching circuits optimum value is Ic/2], but the CFP circuit is very poor on that aspect since R1 usually provides a very small current To see this obscure behavior at high frequencies, just get an oscilloscope, build some CFPs with standard transistors and test them at 100Khz or even at 10Khz of square wave. Simulation software is not very precise simulating bipolar transistors behavior at high frequencies since charge storage and removal phenomena [the thing that causes those delays] are hard to model and depend on the construction and the structure of the die of each particular device |
![]() |
![]() |
Thread Tools | Search this Thread |
|
|
![]() |
||||
Thread | Thread Starter | Forum | Replies | Last Post |
newbie with input tran. question and wiring question | imo | Solid State | 0 | 18th January 2006 11:10 PM |
Capacitor Question /question on cap | TunaFish | Parts | 14 | 12th January 2004 03:23 AM |
PS question - tformer question actually | breguetphile | Chip Amps | 2 | 30th May 2003 02:29 PM |
old speaker question, bullet midrange question & link to speaker project | wallijonn | Multi-Way | 10 | 5th November 2002 07:03 AM |
New To Site? | Need Help? |