On second thought.......
They won't be able to figure out how to stop it oscillating, because theirs obviously will. No app note to copy to tell them how, either.
"Larry, that giant sucking sound that you hear.........."- Ross Perot, maniacal egomaniac.
Hey........he would fit in well here!
Jocko
They won't be able to figure out how to stop it oscillating, because theirs obviously will. No app note to copy to tell them how, either.
"Larry, that giant sucking sound that you hear.........."- Ross Perot, maniacal egomaniac.
Hey........he would fit in well here!
Jocko
Jocko Homo dont do this to us
Do not know if you are willing to share the information with us Jocko but:
1: In the Poweramps did you use them as Emitter followers for the output stage? If so do you think it was the non linear load that was causing the problem, i.e. would it work in a line buffer?
2: If used as emitter follower then the stability seems to improve when a cap is placed across the r1 in the schematic in post #3.
Intuitively it could be seen as making it a pure single transistor emitter follower for the higher frequencies since you are "shorting" the resistor r1?
I do not know how to think with stability and the CFP.
What is the equivalence of open loop gain for a CFP so i could estimate phase margin, is it possible at all?
Do not know if you are willing to share the information with us Jocko but:
1: In the Poweramps did you use them as Emitter followers for the output stage? If so do you think it was the non linear load that was causing the problem, i.e. would it work in a line buffer?
2: If used as emitter follower then the stability seems to improve when a cap is placed across the r1 in the schematic in post #3.
Intuitively it could be seen as making it a pure single transistor emitter follower for the higher frequencies since you are "shorting" the resistor r1?
I do not know how to think with stability and the CFP.
What is the equivalence of open loop gain for a CFP so i could estimate phase margin, is it possible at all?
Yes. I used them for the output. As did Nelson Pass and Jeff Rowland at times.
No, it was not a function of load. They just have a tendency to oscillate in the 2-5 MHz range. All by themselves.........
As for a line buffer......
Never had the need to drive so much current into a very low impedance load. Yes, those would be easier to stabilise. But, I have concluded that open-loop designs, such as the diamond buffer sound better. And they are easier to work with.
Never tried using a cap to reduce the gain at HF. Not sure it would help much, as the goal was to keep the impedance flat to aorund 100 kHz, and that only leaves a little over 1 decade before the problems start.
Open loop gain??? I dunno......never tried to put a number on it. I did enough Bode plots to determine phase margin. Seems that the actual numbers in a real world application were more important. With real world loads.
Jocko
No, it was not a function of load. They just have a tendency to oscillate in the 2-5 MHz range. All by themselves.........
As for a line buffer......
Never had the need to drive so much current into a very low impedance load. Yes, those would be easier to stabilise. But, I have concluded that open-loop designs, such as the diamond buffer sound better. And they are easier to work with.
Never tried using a cap to reduce the gain at HF. Not sure it would help much, as the goal was to keep the impedance flat to aorund 100 kHz, and that only leaves a little over 1 decade before the problems start.
Open loop gain??? I dunno......never tried to put a number on it. I did enough Bode plots to determine phase margin. Seems that the actual numbers in a real world application were more important. With real world loads.
Jocko
D Selfs book (and internet pages) also show that whilst a CFP
has superior large signal linearity when used in an output stage
the EF configuration has much lower distortion around 1W,
whilst the CFP has lower distortion near full power.
When the distortion spectrum is considered the CFP looks less
and less attractive as a superior alternative to the EF as the
output stage configuration, IMO it simply isn't for music.
sreten.
has superior large signal linearity when used in an output stage
the EF configuration has much lower distortion around 1W,
whilst the CFP has lower distortion near full power.
When the distortion spectrum is considered the CFP looks less
and less attractive as a superior alternative to the EF as the
output stage configuration, IMO it simply isn't for music.
sreten.Speaking of Diamond buffers...
Speaking of diamond buffers, I'm surprised these guys haven't come up more around here in the discussions of unusual amplifiers... or even come up at all?
NHB
This ought to be worth a little Hoovering with the local crowd....
~Jon
Speaking of diamond buffers, I'm surprised these guys haven't come up more around here in the discussions of unusual amplifiers... or even come up at all?
NHB
An externally hosted image should be here but it was not working when we last tested it.
This ought to be worth a little Hoovering with the local crowd....
~Jon
An externally hosted image should be here but it was not working when we last tested it.
The reason for the CFP having a gain of one is because of the tight feedback loop from the collector of the second transistor to the emitter of the first. It's quite easy by adding a couple of resistors to make a CFP with gain, and this is a useful building block.
Even the 100% feedback unity gain version will have a gain peak at some high frequency because of delays in the NFB loop. Beware, they can and do oscillate!
Even the 100% feedback unity gain version will have a gain peak at some high frequency because of delays in the NFB loop. Beware, they can and do oscillate!
Hi Eva,
I also found this problem with CFP. If You apply no load, and drive Your amplifier with high level, and high speed square wave (no input filter!), You will find that the current from the PSU will increase, due both output devices draw the current in same time.
The solution is very easy: Connect together the base of the output devices with a small RC network. I used 10ohms+22nF+10ohms. The resistors to avoid oscillation, because of the incductance of the wire on the PCB. I tried some value for the capacitor, with measuring the current. 22nF results no current increasing with 50kHz square wave.
sajti
I also found this problem with CFP. If You apply no load, and drive Your amplifier with high level, and high speed square wave (no input filter!), You will find that the current from the PSU will increase, due both output devices draw the current in same time.
The solution is very easy: Connect together the base of the output devices with a small RC network. I used 10ohms+22nF+10ohms. The resistors to avoid oscillation, because of the incductance of the wire on the PCB. I tried some value for the capacitor, with measuring the current. 22nF results no current increasing with 50kHz square wave.
sajti
Hi sreten.
In wich D. Self book, do you refer to his CFP works ?
I haven't find very much things on CFP in "D.Self on audio" (the one i got).
It's surprising that for a CFP the thd rises at low levels maybe because its a class AB stage ?
Maybe on the web, i will find more information...
If you have more precise documentation on this, i am interested of course.
In wich D. Self book, do you refer to his CFP works ?
I haven't find very much things on CFP in "D.Self on audio" (the one i got).
It's surprising that for a CFP the thd rises at low levels maybe because its a class AB stage ?
Maybe on the web, i will find more information...
If you have more precise documentation on this, i am interested of course.
Nice looking amp !
The schematic is quite near something that i have in mind for a global design, except that i would like do it with CFP, cascodes and without feedback.
But someone design it, first !
Have you more details about the design or the patent ?
Well for the moment i need to learn more, and try to work with CFP'S.
My goal is to achieve a simple shematic (for this purpose we only need about 20 to 26 dB of gain, not so hard) but without the drawbacks of solid state devices, linearity, parasitic capacitances, early effect, thermal "distortions", etc...
Briefly, i would like to "assemble" solid state devices around one BJT to counteracts these problems and permits at this BJT to working fine for audio applications.
The schematic is quite near something that i have in mind for a global design, except that i would like do it with CFP, cascodes and without feedback.
But someone design it, first !
Have you more details about the design or the patent ?
Well for the moment i need to learn more, and try to work with CFP'S.
My goal is to achieve a simple shematic (for this purpose we only need about 20 to 26 dB of gain, not so hard) but without the drawbacks of solid state devices, linearity, parasitic capacitances, early effect, thermal "distortions", etc...
Briefly, i would like to "assemble" solid state devices around one BJT to counteracts these problems and permits at this BJT to working fine for audio applications.
Justcallmedad said:
Probably he's talking about "Audio Power Amplifier Handbook" the amplifier black book.
He's got a chapter or two devoted to output stage configurations in that one.
Interesting discussion you have going here... I was thinking that a CFP might be slightly better than an EF in a bootstrapped VAS because it has closer to unity gain.
--
Danny
"Interesting discussion you have going here... I was thinking that a CFP might be slightly better than an EF in a bootstrapped VAS because it has closer to unity gain."
Having built both (but not mamy) my current thinking is that the theoretical nuances of relative distortion between the two topologies is not that important because other factors regarding actual construction become more important.
CF -
Oscilation is a problem but not insurmountable (if limited to what D.Self cal benign it really seems to do no harm) but luck plays a big part. Parralleled devices semm to make the situation even harder.
Thermal tracking is more critical but also easier to achieve. If you mount the Vbe multiplier right on the back of one of the drivers and watch the bias voltage, it will be almost rock steady.
Output devices do not need all be on the same heatsink, which can make constuction more flexible.
EF-
Oscillation cas can still happen but are less common and less untractible. Paralleling output divices doesn't seem to make any additional proiblems in the respect.
Thermal tracking even with the Vbe multiplier screwed right to the back of an output divice is sluggish, you can watch it drift fairly dramatically as conditions change. Fortunately, the topology doesn't seem to be as sensative to the drift, maybe the optional practice of connecting the driver emitters to each other (with a resistor in between) rather than yo the output rail helps mitigate.
All options for locating the Vbe multiplier impose somewhat awkward restrictions on physical construction.
Sum: They both have anoying feature, its just a question of which annoyance you prefere to flog.
Having built both (but not mamy) my current thinking is that the theoretical nuances of relative distortion between the two topologies is not that important because other factors regarding actual construction become more important.
CF -
Oscilation is a problem but not insurmountable (if limited to what D.Self cal benign it really seems to do no harm) but luck plays a big part. Parralleled devices semm to make the situation even harder.
Thermal tracking is more critical but also easier to achieve. If you mount the Vbe multiplier right on the back of one of the drivers and watch the bias voltage, it will be almost rock steady.
Output devices do not need all be on the same heatsink, which can make constuction more flexible.
EF-
Oscillation cas can still happen but are less common and less untractible. Paralleling output divices doesn't seem to make any additional proiblems in the respect.
Thermal tracking even with the Vbe multiplier screwed right to the back of an output divice is sluggish, you can watch it drift fairly dramatically as conditions change. Fortunately, the topology doesn't seem to be as sensative to the drift, maybe the optional practice of connecting the driver emitters to each other (with a resistor in between) rather than yo the output rail helps mitigate.
All options for locating the Vbe multiplier impose somewhat awkward restrictions on physical construction.
Sum: They both have anoying feature, its just a question of which annoyance you prefere to flog.
Using Self's own approach, you quickly get to the point c/o from either one can be pushed quite low. Low enough that only the lowest distortion Class A's are lower.
In any case, achieving optimum from either depends on optimal bias. Even if you achieve optimal bias, some people have reported that due to age, heat, etc the bias tends to drift away from optimum such that CF types need to be reset every few months of they loose their advantage. (This is one of the arguments for L-MOSFETs - it takes a lot of bias drift to change measurable distortion a little.) I have some half baked notions in my head about ways to attack this but I need to build several more amps to gain more experience with the basics before getting experimental.
One idea is having external acess to trim pot (like the tube guys) and somehow adapting Rod Elliot's SIM circuit as an indicator that tells you when you have it optimal. Probably to klutzy to work but apeals to the types that like to fiddle: "Ahem. Before we listen to the Allegretto Poco Mosso track let me re-align the Vbe multiplier!"
In any case, achieving optimum from either depends on optimal bias. Even if you achieve optimal bias, some people have reported that due to age, heat, etc the bias tends to drift away from optimum such that CF types need to be reset every few months of they loose their advantage. (This is one of the arguments for L-MOSFETs - it takes a lot of bias drift to change measurable distortion a little.) I have some half baked notions in my head about ways to attack this but I need to build several more amps to gain more experience with the basics before getting experimental.
One idea is having external acess to trim pot (like the tube guys) and somehow adapting Rod Elliot's SIM circuit as an indicator that tells you when you have it optimal. Probably to klutzy to work but apeals to the types that like to fiddle: "Ahem. Before we listen to the Allegretto Poco Mosso track let me re-align the Vbe multiplier!"
You can take the EF output stage and design it not for low THD,
but for high optimal standing current and a distortion spectra
with low harmonic generation impossible with the CFP.
Intrinsic in this approach is also real thermal feedback for bias.
You can get much nearer to real Class A performance, D.Selfs
use of THD near maximum levels is totally misleading IMO,
implying the CFP is nearer class A, simply put it isn't.
All the information is in his books, just he doesn't use it,
perhaps on purpose as he doesn't want to go there.
sreten.
but for high optimal standing current and a distortion spectra
with low harmonic generation impossible with the CFP.
Intrinsic in this approach is also real thermal feedback for bias.
You can get much nearer to real Class A performance, D.Selfs
use of THD near maximum levels is totally misleading IMO,
implying the CFP is nearer class A, simply put it isn't.
All the information is in his books, just he doesn't use it,
perhaps on purpose as he doesn't want to go there.
sreten.
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