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Stability of an amplifier under capacitive loading
Stability of an amplifier under capacitive loading
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Old 13th September 2020, 03:51 PM   #41
steveu is offline steveu  United States
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I think knutn is trying to say that if the dominant pole is the output capacitance then more capacitance just makes it more dominant. But, or course, that's a plan that doesn't work well at all. For one reason, real capacitors large enough to create a dominant pole on the output has a self resonance, due to its inductance, that is below the 0dB loop gain frequency. The classic VAS Miller cap works because the self resonance of a ~100pF cap is very high and it is small and can be connected to the VAS transistor with very short wires/traces.
Capacitor Self-resonant Frequency and Signal Integrity | Advanced PCB Design Blog | Cadence

Another reason is that making the naturally dominant pole more dominant gives the best bandwidth vs creating another pole that is so low that it dominates the natural pole of the VAS. Even if the output is the VAS, the naturally dominant pole is the Cbc and not the collector loading.

Last edited by steveu; 13th September 2020 at 04:11 PM.
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Old 13th September 2020, 05:18 PM   #42
knutn is offline knutn  Norway
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i have attached my amplifier with common emitter output, so anyone who cares can play with different loads.
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Old 13th September 2020, 05:24 PM   #43
knutn is offline knutn  Norway
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Before anyone asks: Yes, it is a modified (20 W) Hiraga. More details can be found at: Class A Audio Power Amplifier Mimir
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Old 13th September 2020, 11:23 PM   #44
spladski is offline spladski  United Kingdom
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Quote:
Originally Posted by knutn View Post
I'll try to explain why I think it is better with a common emitter output stage.
A 'better' example might backup you up. A slow design with significant distortion would not be 'better' in many people's view.
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Old 14th September 2020, 01:47 PM   #45
spladski is offline spladski  United Kingdom
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What is the THD 1V in 200KHz into 8 ohm in parallel with 0.1uF?
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Old 14th September 2020, 05:11 PM   #46
mjona is offline mjona  New Zealand
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Quote:
Originally Posted by profdc9 View Post
I am working on building up Michael Chua's C300 amplifier which does include a Zobel load on it. I have a SPICE simulation of it going. I am trying to figure out what could go wrong with it through simulation. I have been able to put 10 to 20 nF on it without problems, but once 100 nF is directly loaded on it, oscillations start. I can increase the Miller compensation capacitor to bring the pole down to be stable, but if the loop bandwidth is reduced too much, THD increases. It seems to be in the neighborhood of 0.05% to 0.1% for 20 kHz @ 200 W output to an 8 ohm load (at least in simulation).


Why are you using MJE340 and MJE350 in your Vas - the datasheets don't give any clue as to the fT which makes them unsuited to this application.
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Old 14th September 2020, 05:41 PM   #47
profdc9 is offline profdc9
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Ok, to get a better handle on the performance, I did SPICE analysis and repeated the analysis of Bonsai in this presentation to check my work:

Output L_1

The first set of plots is a sanity check to show that the simulation of the circuit from the presentation recapitulates the Bode plot results, and it appears to do so.

The second set of plots is the circuit I have been testing with a 33 pF Miller compensation feedback and MJE340/350 transistors as the VAS and Darlington drivers. The phase margin appears to be about 60 to 70 degrees.

The third set of plots is the circuit with a 100 pF Miller compensation feedback network and MJ15032/33 transistors as the VAS and Darlington drivers with 0.01 uF load and 1 uH series inductance output. The phase margin appears to be about 50 to 60 degrees.

The fourth set is the circuit with the 100 pF Miller compensation feedback network and MJ10532/33 transistors with a 0.1 uF load and 0 uH series inductance output, showing the appearance of the pole due to the capacitance on the output.


I think this might help explain some of the issues here, that the output is not unconditionally stable and probably needs the output inductor, though I think for the MJE10532/33 design 0.03 to 0.04 uF of capacitance can be tolerated before oscillations become possible.
Attached Images
File Type: png SimpleAmp_Schematic.png (59.9 KB, 150 views)
File Type: png SimpleAmp_BodePlot.png (78.0 KB, 131 views)
File Type: png C300_MJE340350_Schematic.png (76.3 KB, 122 views)
File Type: png C300_MJE340350_BodePlot.png (100.0 KB, 127 views)
File Type: png C300_MJE15032_Schematic.png (75.7 KB, 40 views)
File Type: png C300_MJE15032_BodePlot.png (85.9 KB, 37 views)
File Type: png C300_MJE15032_Schematic_Capacitively_Loaded.png (76.2 KB, 38 views)
File Type: png C300_MJE15032_BodePlot_Capacitively_Loaded.png (84.3 KB, 40 views)
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File Type: zip Qucs-S-files.zip (11.4 KB, 4 views)
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Old 14th September 2020, 05:54 PM   #48
duncan2 is offline duncan2  United Kingdom
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Your right Mjona online I cant find the Ft but in one equivalent book I have says --equivalent is BD232 which is 3MHz but in my Mullard equivalent book their higher spec one has the BD232 as a line driver in TV,s at 20MHz but I suspect its the lower spec =3MHz Ft as all the other ones near that year of manufacture have 3MHz .


There are different versions of the MJE340 .
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Old 14th September 2020, 08:11 PM   #49
mjona is offline mjona  New Zealand
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Quote:
Originally Posted by profdc9 View Post
Ok, to get a better handle on the performance, I did SPICE analysis and repeated the analysis of Bonsai in this presentation to check my work:

Output L_1

The first set of plots is a sanity check to show that the simulation of the circuit from the presentation recapitulates the Bode plot results, and it appears to do so.

The second set of plots is the circuit I have been testing with a 33 pF Miller compensation feedback and MJE340/350 transistors as the VAS and Darlington drivers. The phase margin appears to be about 60 to 70 degrees.

The third set of plots is the circuit with a 100 pF Miller compensation feedback network and MJ15032/33 transistors as the VAS and Darlington drivers with 0.01 uF load and 1 uH series inductance output. The phase margin appears to be about 50 to 60 degrees.

The fourth set is the circuit with the 100 pF Miller compensation feedback network and MJ10532/33 transistors with a 0.1 uF load and 0 uH series inductance output, showing the appearance of the pole due to the capacitance on the output.


I think this might help explain some of the issues here, that the output is not unconditionally stable and probably needs the output inductor, though I think for the MJE10532/33 design 0.03 to 0.04 uF of capacitance can be tolerated before oscillations become possible.
Forgetting questions about inductors etc for now 2SA1381 is a better choice for the Vas position because this extends the unity gain bandwidth.

Bonsai has mentioned the rate of decline in gain of 20dB/decade with compensation which is equivalent to an angle of 45 degrees starting from the point where the gain reaches - 3dB (0.707).

If you go with 2SA1381 the -3dB frequency will increase and the point where the phase angle starts to change will also increase - this is around a decade in frequency below the new -3dB point.

The decade rule also applies to compensation in that the Vas pole has should be ten times greater than any other pole to be dominant.

C6 has been mentioned in a different context in a previous post. Bob Cordell has cautioned against using lead capacitors. This could also compromise the dominance of the Vas compensation.
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Old 15th September 2020, 01:43 AM   #50
spladski is offline spladski  United Kingdom
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Add cap from C9 collector point to ground, and make it big enough, it should help with the capacitive load. You can also try chucking away C6.

Last edited by spladski; 15th September 2020 at 02:12 AM. Reason: Correction
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