Just another lateral FET amp

[29285]

So I set DC voltage to +-20V, power consumption raised to 0.2amps - a bit too much. Bias might be reduced.
Measuring DC-output reads about 1mV.
This looks like an exceptional start!

 

[gannaji]

Thank you !

 

[Walkalone]

Thanks guys,
As my experience of Chinese PCB's manufacturers, PCBWay seems the best quality. They usually use KB (King Board, Taiwan) PCB board.
Come back into the case ALLPCB, they show to me test report of PCB (Shengyi) which passed UL94V-0 standard.

Regards,

 

[29285]

Continuing the metal work....

 

[29285]

Here are some pics - metal works are finished. It looks as though there is some room for improving my free-hand routing skills.

 

[29285]

back to measurements.
Setting supply to +-30V=.
Input is shorted with a jumper.

Current consumption is close to 0.3amps.
A first measurement with the scope

 

[29285]

What you see is a slightly distorted sinewave of 29Vpp with nearly 9MHz.

Unintentionnally I built a short wave transmitter

 

[29285]

A quick and dirty output snubber 10nF in series with 5R6 tames that beast.
Total current consumption dropped to about 50mA.

 

[29285]

Some measurements with +-30V supply, 5R0 dummy load and sine wave input. It should be mentioned that the dummy incl wiring is not really inductorless - at 1MHz this load is neglible.

 

[29285]

The 100kHz sine plots show some irregularities, obviously crossover distortion. Power MOSFET bias was near 30mA, so I changed the bias setting to about 80mA yielding a smoother curve shape. I guess even more bias may be advisable.
Back at audio frequencies I started distortion measurements with ARTA and my EMU 0202 USB-soundcard.
To avoid disappointments while hunting for ultra low THD results it is a good idea to examine the limits of the measurement setup first- i.e starting with a loopback measurement.

 

[29285]

Not too bad, but never will we measure more than two zeros behind the period with this setup.

Measuring the EUT with no load at output will show the overall residual distortion of the hole signal path - presumably dominated by the soundcard:

 

[nigelwright7557]

The 100kHz sine plots show some irregularities, obviously crossover distortion..

The old Hitachi lateral mosfet datasheet recommended 100mA bias current.

 

[29285]

The same test with the output loaded by a 5Ohm dummy shows slightly rising TIM that originate from current distortion of the amplifier.

 

[29285]

Anyway, distortion of this amp is in the league of my soundcard. To improve measuring resolution a bit I shall increase the amplifiers gain from 10V/V to 33V/V while trying not to change loop gain. This will relax the limited output level of the soundcard enabling operation closer to its own sweetspot.

 

[29285]

Using ARTAs level meter I measured output noise with potentiometer set to minimum i.e. input shorted.
Reading -93dBV C-weighted computes to 22uVrms output noise or 0.68uVrms input referred noise.

Until now this is the lowest noise level I measured this way with my USB soundcard setup.

 

[29285]

To power this baby I bought a small toroidal xformer 2x24V/80VA. An extra pcb provides rectifier and bulk caps as well as two charge pumps for bootstrapped supply of the driving stage.

 

[29285]

This time I ordered the pcbs at JLCPCB. Considering the non-standard dimensions of 130x50mm their offer is a really bargain.

 

[29285]

In the meantime I continued distortion measurements in my little cellar mancave.

 

[29285]

To investigate the influence of output bias setting I patched a trimpot to the bias circuit. Sweeping from 50 ~ 150mA nearly made no difference. But moving the output wires from one side to the other made a visible change of the level of the higher harmonics resulting in a slighty better THD number. So I guess that at the time the distortion is dominated by some parasitic coupling and thus more a matter of physical layout than of the bias setting. Here we have asymmetric input and output - generally not the best prerequisites for ultra high S/N. This is where theory (LTspice) meets the real world.
Nonetheless I will present current THD measurement at 1kHz, 10Vrms into 5 Ohms.
You can see the harmonic levels:
H1 -17.6dBFS
H2 -118dBFS
H3 -135dBFS

 

[29285]

Obviously measuring harmonics with amplitudes approx 100dB below the signal is not an easy task. So I have an idea for an alternative approach: Instead of measuring the output at the sources of the FET let us measure their gate voltage. Here the hole crossover distortion of the output devices is available, several orders of magnitude higher than at the output (greetings from the Quad amp). I suspect that setting the bias to minimal THD at the gates should minimize crossover distortion as well - at least theoretical. And as we all know, the difference between theory and reality is - theoretically - none!