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My attempts at a design of a 3 stage amplifier
My attempts at a design of a 3 stage amplifier
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Old Yesterday, 10:45 AM   #261
edbarx is offline edbarx  Malta
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Join Date: May 2018
Quote:
Originally Posted by mjona
So what happens if a voltage spike is generated across the output transistors when an attempted termination of output current occurs at high power outputs?
That means somehow telling LTSpice to simulate for the output resistance suddenly becoming infinite. I do not know how to instruct LTSpice to do that.
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Old Yesterday, 05:36 PM   #262
mjona is offline mjona  New Zealand
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Join Date: Jul 2007
Location: Upper Hutt
Quote:
Originally Posted by edbarx View Post
That means somehow telling LTSpice to simulate for the output resistance suddenly becoming infinite. I do not know how to instruct LTSpice to do that.
As you appreciate when the output transistor current is terminated the speaker coil is still in motion there has to be a discharge path for the electrical energy generated by this at high power.

Where I see this heading is you will need to specify all your component designations in order for someone to upload that detail into software for circuit board layout. I don't build amplifiers of this scale and design my layouts by hand.

The usual way to divert spikes is to connect rectifier diodes in reverse polarity to the supply rails between these points and the amplifier output.
If you look inside your hardware you will see the evidence of this.

I don't include this sort of detail on my .asc files and deal with this when I draw up the circuit board.

You have not covered this base in your simulations - don't be caught unawares.
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Old Yesterday, 07:28 PM   #263
edbarx is offline edbarx  Malta
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Join Date: May 2018
Thank you for your advice. Yes, I noticed two diodes across the NPN and PNP transistor arrays, but I did not know what was the purpose. I thought it was to protect the output when there is a polarity reversal, although at these voltages such a thing would certainly cause some form of damage.

Like you, I will manually create the PCBs. The first will be two narrow PCBs for the NPN and PNP array sections. The other circuit parts will be on a large separate PCB.
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