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Frankenstain amp v2
Frankenstain amp v2
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Old 8th July 2018, 04:58 PM   #1
boriss111 is offline boriss111  United Arab Emirates
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Default Frankenstain amp v2

I have been playing with a clone for Nelson Pass' F6 amplifier for some time now. I liked the simplicity of F6, seamed like something suitable for a beginner like me. Initially the buffer at the input was made with an op-amp, and later I tried with a discrete VAS/buffer stage using two MOSFETs. While this was working fine in the simulation, I had my doubts abut the transformer. The values I have used in the simulation were just approximations based on information found online. Therefore the risk of failure couldn't be ignored.



I also wanted to have global NFB, as I had a feeling that it would improve the result. Therefore I decided to go back to op-amp based input (hence this design is posted in this forum ), and started looking for a way to do phase splitting that would allow use of output devices of same polarity.I finally found a design from Dr. Jagodic, called CroSer, that had the phase splitting done via two complementary MOSFETs. I have also found complementary P and N MOSFETs produced by Diodes, readily available with Digikey. Hence the design was born.


While the results of this design are really nice, THD 0.000008%, I am somewhat concerned about the biasing circuit. Any suggestions on how to improve it?
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Old 9th July 2018, 11:20 AM   #2
boriss111 is offline boriss111  United Arab Emirates
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Hi all,

Any ideas?
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Old 9th July 2018, 02:14 PM   #3
ilimzn is offline ilimzn  Croatia
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here's one: where is the output BJT bias genarated and how does it track their temperature, which is absolutely essential if you want them to live
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Old 10th July 2018, 05:50 AM   #4
boriss111 is offline boriss111  United Arab Emirates
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Hi Ilimnz,

There is none, I don't really know how to make one. I have seen many designs where a temperature compensation transistors is used in the middle of the BIAS circuit, but I am not sure how to use them in this one where the input from the previous stage has 0V DC. Maybe two should be used, one for each output pair, connected as a diode in series with the 240R resistors (that would need then to be recalculated for correct DC BIAS of the MOSFETS)? Or something completely different?
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Old 10th July 2018, 11:28 AM   #5
ilimzn is offline ilimzn  Croatia
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So in other words, you are expecting someone else to invent a solution to a problem inherent in a topology you insist on using in your amplifier - which BTW is only half of what Dr. Jagodic used in his, which you used as a template. I'm sure there's a reason for thet.
Ask yourself, how much time and knowledge did it take for you to put together that schematic, and how much time and knowledge does it take to solve it's inherent problems (and maybe that's why you don't see it that often), and consequently why someone else should invest it in your project? Would you actually learn from a finished solution?

Also: there is a difference between running things in a simulator and in the real world. If you don't look at certain points in your sim, you will never know that it is in fact failing. Just for fun, try varying the global temperature and see what the idle current does.
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Old 10th July 2018, 01:07 PM   #6
boriss111 is offline boriss111  United Arab Emirates
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Hi Ilimzn,


Thanks for the advice. I have invested all the time and knowledge I have, which apparently is not enough.



I apologize for the inconvenience.
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