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The AMNESIS amp: a good amplifier, like a gentleman, has no memory.
The AMNESIS amp: a good amplifier, like a gentleman, has no memory.
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Old 11th November 2018, 03:54 PM   #281
Hans Polak is offline Hans Polak  Netherlands
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Location: Blaricum
Hi Max,


Before I show you the Thermal Effects at 60 Hz, I have first of all cleaned up your circuit diagram by removing resistors and caps without an obvious function.
For instance placing caps on a power supply line from a voltage source makes no sense, because output impedance is 0 Ohm from zero Hz to infinity.

I have already explained the changes in the Vas, with an emitter follower and just one dominant cap, in this case 50 pF.
Your common base solution can only sink an not source current, giving the funny square wave response as shown in my previous posting.

Furthermore have I removed the 100pF cap in the input pair's tail current plus both 1 K resistors.
This results in a huge 33dB drop in IM distortion at 1KHz, with a 19+20 Khz 1:1 test signal.

In the output section I have altered the 1K values around the Mosfets into 2k to improve stability. To prevent the Mosfets to be cutoff when the other one is conducting, resistors have been added to always allow a minimal amount of current.

Last but not least, I have put all models in Amnesis.lib.
In the .asc file you have to add ".include amnesis.lib" after having copied this file into the LTSpiceIV LIB directory with your the file handling system of your computer.
The .asc file already has the square wave generator installed.


Hans
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File Type: jpg New Amnesis 3.jpg (427.3 KB, 90 views)
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File Type: asc AMNESIS QUAD BOOTSTRAP BUFFER TEST2.asc (16.2 KB, 8 views)
File Type: zip Amnesis.zip (2.9 KB, 6 views)
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Old 12th November 2018, 12:18 PM   #282
Hans Polak is offline Hans Polak  Netherlands
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Quote:
Originally Posted by maxlorenz View Post
I wish you all read Dr. Kolimunni's book as it analizes all this in detail and proposes some original input arrangements for his own circuits that are far more complex than ours.
M.
Max,

I have read Kolinummi's interesting book but when simulating some circuits in his book, I found large deviations from statements he made, pushing you in the wrong direction.
Showing some deviations in a comprehensive explanation step by step , never resulted in any reaction from his side.


The morale is: when properly done, Spice simulations do deserve the credit to validate with great technical confidence, so don't take everything for granted.
But at the end, only your ears can make the final decision.
Stan Curtis, former head of Cambridge Audio once mentioned: give three designers the same circuit diagram and let them design their own PCB.
The result will be three amps sounding differently.


Hans
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Old 14th November 2018, 11:02 PM   #283
Hans Polak is offline Hans Polak  Netherlands
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Dear Max,


Since I wanted to know for once and for all the electrical benefits of a Szkilai input pair, I invested quite some time in looking at the thing from different perspectives.
I monitored the power absorbed by Q3, the input transistor, by multiplying Vce * Ie.
Assuming a time constant for a small SOT transistor, a low pass filter with an RC time of 0.5 sec was used to filter this power signal.


To start with I simulated with CFP and without CFP in fig 1 and 2 below.
This resulted in a big difference in heating Q3.
However, when changing R7, the current source resistor, from 100 Ohm just by 0.1% into 100.1 Ohm, fig 3 appeared, showing that this 100 Ohm resistor was an extremely lucky shot, not possible to realise in practice with such an high sensitivity.
When feeding the Non CFP version with an ideal current source, fig 4 appeared, proving the current source is causing trouble.
This is because the VAS is modulating the power rail, feeding the current source with a fluctuating supply.
That's why I modified the current source being almost independent of supply voltage.
See second image below showing the original next to the modified version.


As a next step simulations were made for 100 Hz, 1 Khz and 10 Khz, with and without CFP, but in all cases with Q3 carrying a current of slightly below 1 mA.
Results are visible in fig 5 to fig 10, all speaking for themselves.


To conclude: the slow changing temp curve results in a subsonic Vbe change that is completely harmless, but as can be seen, the Non CFP version is doing even better as the CFP version in that respect.


If a transistor could follow in heating up and cooling down a 100Hz signal, which of course is absolutely not the case with a 0.5sec time constant, but even if this were true, I showed in posting 273 and 276 that the resulting heating up for a 0.1Veff input signal this would result in Vbe change of less than 1pV, or some 80dB below the input noise of Q3.


As can be seen in the Figures, after 0.5 sec RC filtering, the peak to peak values are even much lower, making the Vbe changes into the femto region, drowning completely into the input noise.
When audible differences are noticed with a Szkilai input pair, I don't see how this can anything having to do with thermal effects.

Hans
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File Type: jpg Current.jpg (89.0 KB, 59 views)
File Type: jpg Total2.jpg (590.4 KB, 49 views)
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Old Today, 01:57 PM   #284
maxlorenz is offline maxlorenz  Chile
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Guys, thank you very much for your contributions. For some reason I didn't get the notification...now I need time to digest these informations that are probably beyond my present ability to cope with

So I must test and revert to my first arrangement for the cascoded input CCS.
I forgot to test ferrites at the gates.
No need for extra gate/base resistors then. I forgot that the extra base resistors were only to test RC decoupling to ground for oscillation taming. Now the C are not needed.

As I said before, I prefer the sound of the bootstrapped-CFP input. What is the cause? I don't know. The late Hepha´stos performed single impulse tests on transistors to prove TMD and gave much importance to complex signal behavior in contrast to periodic signal...

Meanwhile, take a look at this:

Hybrid Cascodes Simplify SiC Adoption in Popular Power Circuits | Electronic Design

I hope we can find a stable potential circuit to build a nice PCB where we can experiment for ourselves the pros and cons of this little monster, step by step if you want. Many heads think better than one...

With a totally stable circuit I will test my VFET bootstrapped output.

Cheers,
M.

Last edited by maxlorenz; Today at 01:59 PM.
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