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Amp designed during lunch breaks
Amp designed during lunch breaks
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Old 7th November 2018, 02:56 AM   #171
nauta is offline nauta  Canada
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Join Date: Sep 2017
Hi

What is the idle current for the output devices?
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Old 8th November 2018, 08:14 PM   #172
mcd99 is offline mcd99  United Kingdom
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Join Date: Mar 2008
Location: UK
Hi David,

Bet you had forgotten all about the lunchtime amp

It has been redesigned a little to run off higher voltage rails. +/- 59V for the front end and +/-47V for the output stage. The compensation has been re-tuned as well.

One thing that struck me is how close this compensation is to OITPC (Dadod). I could run an experiment and try OITPC but sims don't suggest any real gain. maybe the folded cascode isn't the ideal VAs to use with OITPC or maybe I am tuning the OITPC incorrectly.

The attached is almost an "as built" schematic. The main difference being the outut devices. The schematic has MJL4281 and MJL4302 whereas I have 2SA1386Y and 2SC3519Y. All front end transistors are matched and the LTP input transistors are a quad match.

Hi Nauta,

The outut devices are currently running at 70mA each.


Attached are the usual plots etc. Current sources are JFET (2sk246).
More pictures will follow...

Paul
Attached Images
File Type: png Lunchtime amp 60v.png (221.1 KB, 37 views)
File Type: png Main Loop.png (193.1 KB, 37 views)
File Type: png VAS Loop.png (195.2 KB, 28 views)
Attached Files
File Type: asc Lunchtime amp 60v.asc (23.3 KB, 5 views)

Last edited by mcd99; 8th November 2018 at 08:23 PM. Reason: Attachment name changes
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