What defines whether the output of a stage is current or voltage? Self and Cordell's books both say that the output of the IPS LTP is in current form. What makes this so? Is it simply because of relatively low voltage gain?
What's more, when I simulated the simple amp in chapter 2 of Cordell's book, with a current mirror LTP load being the only improvement, the voltage output of the IPS looked horribly distorted while the current output was a pretty good looking sine wave. What's going on here?
What's more, when I simulated the simple amp in chapter 2 of Cordell's book, with a current mirror LTP load being the only improvement, the voltage output of the IPS looked horribly distorted while the current output was a pretty good looking sine wave. What's going on here?
When the output impedance of the LTP is much more than the load then the current is not much affected by variations in the load impedance, whereas the potential will vary to match. This is the case over much of the frequency spectrum when Miller compensation is used.
So the input potential difference between the two inputs determines the current out.
The effective definition is that if the output impedance is much more than the load then it is current output and if the output impedance is much less then ...well I am sure you can work that one out.
Does the explanation above clarify this to you? IIRC Self comments on this too. It can look bad but if the so called VAS actually has it's output determined by the input current then it all works out.
Best wishes
David
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Ok, tell me if I'm on the right track. If I treat the ISP and VAS as a voltage divider, the VAS behaves (in this case anyway) like a resistor who's resistance is constantly changing in a non-linear way, so that a clean looking current creates a wacky voltage signal.
That part makes sense. Now what's confusing me is exactly how the VAS is able to use this signal. Wouldn't using a current as the input to the VAS be dependent on beta, where as using voltage would be dependent on transconductance, the latter which is more dependable, or at least my impression has been that that is the case?
It is also hard for me to understand how this wacky voltage signal doesn't affect the VAS output.
I assume that an improved VAS design makes for more linear loading of the ISP. Is that part of this?
That part makes sense. Now what's confusing me is exactly how the VAS is able to use this signal. Wouldn't using a current as the input to the VAS be dependent on beta, where as using voltage would be dependent on transconductance, the latter which is more dependable, or at least my impression has been that that is the case?
It is also hard for me to understand how this wacky voltage signal doesn't affect the VAS output.
I assume that an improved VAS design makes for more linear loading of the ISP. Is that part of this?
Yes, the beta is less predictable than the transconductance. But if there is sufficient gain then the current feedback thru the compensation (Miller) capacitor dominates and is very predictable.
More later if you want, bedtime here!
Best wishes
David
With a two transistor (beta transistor added) VAS then the Miller capacitor is in play down pretty low, rather unpredictable because depends on beta, but below much of the audio band. And below that then the overall feedback takes care of the non-linearities. So we don't rely on the distortion harmonics to be in the Miller capacitors band of influence.
Best wishes
David
What does "in play" mean exactly. Remember, I'm pretty green at this stuff. I was under the impression that the miller cap is chosen so that unity gain is reached pretty high up in the audio band. Apparently I'm wrong.
In a vanilla miller compensation scheme, (just the one cap around the single VAS, or even a 2 transistor VAS as you mentioned), how many dB of cut is there at typically 20hz? How much dB of cut before the cap is no longer significantly relavent?
In a vanilla miller compensation scheme, (just the one cap around the single VAS, or even a 2 transistor VAS as you mentioned), how many dB of cut is there at typically 20hz? How much dB of cut before the cap is no longer significantly relavent?
The LTP is fed from a current source. The input signal 'steers' the the LTP current source into either one of the two LTP collector loads - be they resistor or mirror.
Anytime you connect a capacitor to a current - which is what you are doing in the VAS stage, you form an integrator, and a key property of an integrator is that it converts a current input into a voltage output (transimpeadance circuit).
As the other posters note, at very low frequencies and DC, its the VAS (better to call it by its proper term: Transimpedance stage or 'TIS') transistor beta that dominates the transfer function, and not the action if the input current and the Miller cap, Cdom.
Anytime you connect a capacitor to a current - which is what you are doing in the VAS stage, you form an integrator, and a key property of an integrator is that it converts a current input into a voltage output (transimpeadance circuit).
As the other posters note, at very low frequencies and DC, its the VAS (better to call it by its proper term: Transimpedance stage or 'TIS') transistor beta that dominates the transfer function, and not the action if the input current and the Miller cap, Cdom.
I only used the phrase because you did first
The Miller cap is chosen to define the unity loop gain crossover point, well outside (above) the audio band.
As the frequency falls then eventually there is not sufficient gain for the Miller capacitance current to dominate and it is "out of play" to use your term.
Bob Cordell's book in chapter 3 has excellent plots of typical values for loop gain that I will not duplicate here.
Best wishes
David.
Ok, I think I maybe discovered one misunderstanding about the miller cap that I had. I had thought the current flowed in from the VAS collector side and the voltage was presented as negative feedback at the VAS base. Now I am starting to think that the current inputs into the base side and the voltage is presented at the VAS collector. Or is it a mixture of both, depending on the frequency?
To be honest, I never took calculus, so how a integrator works is not clear to me. I looked at a glance in my "Calculus for Dummies" book, but the description of integration didn't seem to connect any dots for me as to what it had to do with this circuit.
Is this easily explainable, or do I need to delve into calculus to understand this?
I know these must seem like lame questions, but I don't want to get to far into more advanced stuff if my basics are lacking. I truly appreciate those who have taken the time to help!
To be honest, I never took calculus, so how a integrator works is not clear to me. I looked at a glance in my "Calculus for Dummies" book, but the description of integration didn't seem to connect any dots for me as to what it had to do with this circuit.
Is this easily explainable, or do I need to delve into calculus to understand this?
I know these must seem like lame questions, but I don't want to get to far into more advanced stuff if my basics are lacking. I truly appreciate those who have taken the time to help!
Well, there is a conservation law so the current in to the capacitor at the (so called) VAS collector end has to equal the current out at the VAS base.
And the current is a function of the potential difference so potential matters at both ends too, but is dominated by the collector variation.
Perhaps the easiest way is to think that the VAS sets the potential at its collector that drives a current thru the capacitor to cancel out the current from the LTP. This is the "op-amp" approximation if the current gain of the VAS is sufficient that the input current is very small. So it needs to be balanced by an opposed current thru the Miller capacitor.
No calculus, is that a bit clear?
Best wishes
David
Ok there is one bit that is bugging me. Why isn't the VAS transistor's input impedance considered in the math? (maybe it is and I haven't noticed) Wouldn't it be in parallel with the miller cap at higher freqs? In the book example, there is a 22 ohm emitter resistor in the VAS. That makes for 2.2k input impedance at an assumed beta of 100. Surely low enough to matter for a good part of the relavant frequency band, right?
Also, the VAS is an inverting stage, but at some point if the Miller cap is dominating, it is being bypassed greatly by the cap, and as someone had mentioned, the VAS collector would no longer be inverting. The cap has its own phase lag, but wouldn't there be some wacky phase issues as the cap's output becomes greater than the VAS output? Or does this all happen at a higher enough frequency that it doesn't matter?
Dang, the more I ponder that one little capacitor, the more complex the thing gets in my mind. When I first encountered the notion, it looked simple, but I seem to have made things worse for myself by thinking too much!
Also, the VAS is an inverting stage, but at some point if the Miller cap is dominating, it is being bypassed greatly by the cap, and as someone had mentioned, the VAS collector would no longer be inverting. The cap has its own phase lag, but wouldn't there be some wacky phase issues as the cap's output becomes greater than the VAS output? Or does this all happen at a higher enough frequency that it doesn't matter?
Dang, the more I ponder that one little capacitor, the more complex the thing gets in my mind. When I first encountered the notion, it looked simple, but I seem to have made things worse for myself by thinking too much!
Exactly correct! And that is why a two transistor VAS with effective beta equal to the product of the 2 individual betas works so much better.
Also exactly correct, top marks! The "wacky phase issue" is called an RHP zero. For a typical bipolar transistor VAS the RHP zero is above the frequency of concern. But it is never desirable to have excess phase. The problem is quite serious in CMOS IC amplifiers and there is a considerable literature on how best to prevent it.
You now have a deeper comprehension than most people, because they don't think about stuff that looks simple. Unbelievable how hard it can be to understand even an apparently simple circuit. Now you can join the debate about Two Pole Compensation TPC and TMC over in Self's thread.
Best wishes
David
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Perhaps, one has to be careful here. With a darlington or other configuration the Miller cap effectively builds a tight loop around the two transistors. The behaviour of this feedback loop can be difficult to control. I remember a number of posts here where people complained about the 'VAS' stabilty.
To my understanding, the configuration is only dependably stable with the emitter resistor, usually used for current sensing together with short curcuit protection of the output stage.
Matthias
Perhaps, one has to be careful here. With a darlington or other configuration the Miller cap effectively builds a tight loop around the two transistors. The behaviour of this feedback loop can be difficult to control. I remember a number of posts here where people complained about the 'VAS' stabilty.
To my understanding, the configuration is only dependably stable with the emitter resistor, usually used for current sensing together with short curcuit protection of the output stage.
Matthias
Yes, of course any time there is extra gain then there is extra potential for instability.
But a two transistor Emitter Follower Added VAS is rather easy to keep stable.
As you say, it usually happens by default anyway.
IIRC Ed Cherry analysed this and showed the emitter resistor has only small performance penalty.
I suspect the cascoded two transistor VAS is a little more problematic, but still not too bad.
Best wishes
David
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