interest at v to i amplifier

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recently, i have a big interest at v to i amplifier, Mr. Broskie had explained it in his blog. This is his design which are my favorite. Please take a look at it. By the way, aikido v to i will be great, right? i hope Mr. Broskie would post the aikido v to i in his blog soon.
 

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Please, if someone can describe this circuit operation...say..stage by stage

circuit analisis...then i will be gratefull and happy.

I have made some efforts to understand and i could not...only part of the circuit was understood....i am too much lazy, now a days, to install it into the simulator, where i can discover a lot of things related the operation (currents, voltages, gain and all specifications)...i would prefere someone, more skilled than uncle charlie, to explain how this circuit operates.

I would like some serious description, not the" emitter follower sending NFB to the EF from the second VAS mirror referenced by Gate driver chip operating as error amplifier from the mute line"....i would like to understand, not to learn more electronic therms.

It looks interesting..... maybe the chip is the convertion from E/I....well.... audio amplifiers are this kind of converters anyway...but this one looks different.

Also if you can point a link or paper that describes it will be nice.... i am searching for exotic circuit...not some over complicated one, as i do think that complicated things are result of low skilled designer that cover their lack of knowledge installing sophistication in the circuit.

I forgot to say....PLEASE!.....i am deep curious about it....hey PADA!....can you describe?....if you can..please, do it!:hypno2:

This circuit made me feel this way the picture attached show.

regards,

Carlos
 

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IC in the middle is just a servo - keep DC out of output.
Input transistors is just level shifting and bias - AC signal at gate of FETs is same as input. FETs convert input voltage to output current. Biased at 4 Amps - one increases current as the other decreases current. No feedback is used. (except for servo)
 
hi, Destroyer X. The schematic above shows a push pull v to i amplifier. The bjt transistors work as phase splitter for the pmos and nmos. What makes this schematic unique is the pmos and nmos are configured as drain follower (high output impedance), not the usual source follower (low output impedance). The output impedance of v to i amplifier is high and near infinity, unlike the v to v, which is low and near zero. So, with the v to i, you'll get lowest distortion from 1 ohm speaker, and with the V to v, you'll get lowest distortion from 99999999 ohm speaker. The dc servo keep the output free from any dc offset, for the speaker safety. For more instructions, use these url. tubecad.com/2011/11/blog0218.htm and tubecad.com/2011/10/blog0217.htm
 
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Hi Pawel, try to use Hann windowing in the LTSpice to see the FFT from different perspective. For a single stage output, such performance is imho unacceptable. My concern is that a little bit more complex bias scheme is not expensive but the difference in performance is usually big.

So why not use a better biasing scheme? Two transistors for each current source for example (a-la PMA opamp-based amplifier).

Here is a comparison between your circuit with another one that I created in less than 5 minutes (so I'm not sure if it works but I have seen similar performance and I have set similar performance as standard/benchmark).
 

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Hi Pawel, try to use Hann windowing in the LTSpice to see the FFT from different perspective. For a single stage output, such performance is imho unacceptable. My concern is that a little bit more complex bias scheme is not expensive but the difference in performance is usually big.

So why not use a better biasing scheme? Two transistors for each current source for example (a-la PMA opamp-based amplifier).

Here is a comparison between your circuit with another one that I created in less than 5 minutes (so I'm not sure if it works but I have seen similar performance and I have set similar performance as standard/benchmark).

please clarify
at the left is my proposition, right better biasing?
please paste the link for amp you compared or better asc file
thank you in advance!
PS I am glad of my idea not because it is lowthdmaster but no hf harmonics fro a single transistor output
and
output transistors might be srewed ti the heatsink without the isolation;)
 
please clarify

Yes, your cct has some good characteristics. But from FFT (THD, noise floor) point of view, it doesn't pass my "standard". Of course yours is a drain follower, which tend to have higher THD than a source follower. But if you "complicate" the biasing scheme I believe the result will be better. If not, I prefer to drop a cct with such performance, and try other topologies.

The chart used for comparison was taken from Pavel's opamp-based amplifier. I just replaced the transistor from IRF540/9540 to IRF632/9630 and adjusted the bias resistor to get to proper Vgs (4v3) because I don't have the model for 9540.

Yes, it is a different animal than your cct. But we should care only with the result right? I mean, it doesn't matter if it is SF or DF, tube or SS. What matters is the result.
 

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Of course yours is a drain follower, which tend to have higher THD than a source follower

nope:nownow:
it is source follower
and what I marked now
you used fft analyse on the left with 15VAC (mine) and on the right (I guess) 4VAC:rolleyes:
look like it behaves at 4VAC:
PS of course it needs further improvements, will let you know
PSII are you comparing THD of gnfb (Pavel's) circuit with my nnfb proposition?
 

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