Biasing Question

[banffskiing]

I would like to replace the output mosfets IRF640 and IRF9640 with Toshiba 2SK1530 and 2SJ201. After looking at the data sheets I noticed that Vgs on the Toshiba has a lower voltag.

Vgs Irf640 is from 2v to 4V

Vgs 2sk1530 is from .8v to2.8V

Seems to me that the Bias point will have to be adjusted but I am not sure which resistors need to be changed or if anything else should be changed. If anyone has any ideas please let me know.

Thanks

[AndrewT]

I see no source resistors fitted to the paralleled output mosFETs.
I foretell a blow up coming.

[CBS240]

Originally Posted by AndrewT

I foretell a blow up coming.

quite right.

Reducing R5 & R23 would reset the DC bias but there is a problem. It also reduces the gain of that stage (T1 & Q8) to less than 1. This means the Op-Amp must output a larger voltage swing. In addition, comparing the transfer functions, 2sk1530/2sj201 requires a larger swing in Vgs for the same conductance, requiring more voltage swing from the Op-Amp.

Thermal connectivity should be between the bias spreader and the driver transistors (T1 & Q8), as is the scheme for CFP OPS. I do not see a requirement for the IRF510 in the circuit. A typical Vbe multiplier should work. This allows you to reduce the bias voltage across R17/R24, reducing the value and lowering the AC impedance at the emitters, increasing gain. The ouput transistors should have source ballast resistors added so there is more equal current sharing and to help 'normalize' the transconducance through the current crossover.

[banffskiing]

I used this same circuit in a car amplifier that I built a long time age. if I remember correctly, I had to match all of the output devices in order to have equal current sharing. I had considered adding the ballast resistors simply because it is very $$ to buy a bunch of mosfets just to find out that they don't match. I would think that ballast resistors would be around .1ohm I am new to the forum and am not familure with the Schematic you mentioned CFP OPS.

Thanks

[CBS240]

Current Feedback Pair. CFP provides voltage gain at the output stage. Current is fed back to the emitters of the drivers establishing a set loop gain for the output stage. In this type of circuit it is the drivers that need to be monitored with a Vbe multiplier for thermal runaway not the output devices. But there would need to be a few changes in the circuit to use 2sk1530/2sj201.

[jan.didden]

Before we all go off into a lengthy discourse on amplifier design, let's just quickly answer the OP's question: R7

jan didden

[Legis]

I'm re-biasing a pair of monoblocks.

Originally they had approx 10mV voltage drop accross the 0,5R emitter resistor, which translates to 20mA bias current per transistor. There are total 24 transistors in this amplifier. As it is a bridged balanced amp, the other amplifier board has 12 and the other 12 transistors. The biasing needs of course to be done on both boards.

The heat sinks support approximately 45mV bias voltage (90mA current). This rises the heat sink's temperature to 47 degrees (room temperature 27 degrees, the hottest time of the year), the final temp might be little higher once I place the amps on equipment rack. The distortiuon figeres, which I measured with E-mu 0404 USB and ARTA, looks promising; H2 drops significantly (~20dB), but H3 rises somewhat (0,0025% -> 0,0045% @ 10kHz = 6dB increase). Why the H3 rises albeit the bias is increased and the transistor should work more linearly and stable? The distortion spectrum in H3-dominated as the biasing reduces the H2 so much.

How do I calculate the actual A-class region of such an amp, does the fact being balanced amp change something? 90mA times 12 (NPNs or PNPs in the amp) = 1080mA (or should I calculate with all 24 transistors = 2160 mA?). How much power does this amp produce in A-class with such bias? (9,3w/18,6w or something else?)

All help and comments much appreciated

Regards,

Legis

[AndrewT]

If the output bias is 1080mA, i.e. 1080 bias flowing throw the 12 NPNs and the same 1080mA flowing through the 12 PNPs, then the ClassA current limit of this Push-Pull stage is 2160mA.

The maximum ClassA output power is Ipk^2 * Rload / 2 = 2.16*2.16*8/2 = 18W

10mVre is unusually low for an EF output stage. Is your amp fitted with a CFP output stage?
But, equally, 45mVre is well above an optimal ClassAB bias voltage.

Q.
does the bridged balanced amp have 24 output transistors or 48 output transistors?
If 24, then it must have a 6pair output stage in each balanced half and the 10mVre total bias current is only 120mA for a ClassA current limit of 240mA giving 1/4W of ClassA output.

[Legis]

Originally Posted by AndrewT

If the output bias is 1080mA, i.e. 1080 bias flowing throw the 12 NPNs and the same 1080mA flowing through the 12 PNPs, then the ClassA current limit of this Push-Pull stage is 2160mA.

The maximum ClassA output power is Ipk^2 * Rload / 2 = 2.16*2.16*8/2 = 18W

10mVre is unusually low for an EF output stage. Is your amp fitted with a CFP output stage?
But, equally, 45mVre is well above an optimal ClassAB bias voltage.

Hi Andrew,

I could use some common English . I have no idea, what are the charachteristics/differences of EF and CFP output stages? Here you can see the one amp PCB of the amplifier: Emotiva XPA-1 vs Jungson 99D

Yep, I read something about commonly recommended optimal bias voltage of 22-23mV. Tried that, did not notice anything special, the H3 had already risen so upping the bias beyond this comes "free". I would quess somewhere around 14mV does not change the H3, or if it does, it is very slight.

I also noticed that the amp distorts little more when driven past the A-class region. With low bias the behaviour at high leves is better. This is common trade-off between high/low bias I quess?

[AndrewT]

That looks like a 6pair output stage.
bias to 22mVre for a total bias of 264mA.
The maximum ClassA is ~ 1W

EF = Emitter Follower.
CFP = Compound/Complementary Follower Pair.