bipolar (BJT) transistor families for audio power output stages

for sure, if the impedance of the generator is very low..

Wrong again. For a common emitter stage with no degeneration and zero generator impedance, the voltage gain is Au=gm*Zl where Zl is the load impedance and gm is the device transconductance gm=Ic/Vt with Vt=kt/q=26mV at room temperature.

Nothing to do with beta, even if you further consider the effect of Cob.
 
Mr. Cordell,
I am using resistor between bases of output transistors in order 33-47 ohm, so drivers are running at higher bias. With paralel capacitor about 1uF it performs quite well, this capacity seems to be enough. It is needed (in real life, not in testing with 100kHz square at full power) only at short ,fast transients, so here is a lot of time to discharge. This metod seems to me not so expensive (faster power devices with the same SOAR and Pd= more pieces and expensive device), and results are about the same. No crosconduction problems with "slow" MJL , power bandwith to about 200kHz, quite good DIM 100 and IMD19+20 results. Runnig drivers in A class or very near this (e.g resistors to opposite rails) brings (according my experiences) no advantages and improvement.
And I am always measuring performance (whole amplifier) also without load, at different levels and frequencies, to discover what really is caused by output devices.

A good test in simulation is to look at the collector current of the driver and see if it ever shuts off. You don't want this. In the configuration where the driver bias resistor is connected emitter-to-emitter, the driver should be always in class A. If collector current goes to zero on a fast-moving signal into a low-Z load, it means that there was not enough turn-off current available to the output transistor.

Merry Christmas,
Bob
 
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When you use high fT output devices you generally will also need base stopper resistors and these will severely limit the peak base "suck-out" current, mitigating the advantage to some degree. Suppose you have a crossover region of 2V and 4.7 ohm base stoppers - 2/4.7 = 425mA.

The capacitor trick across the driver bias resistor is much more effective on low fT output stages that can get away without base stopper because of this.

Also, running the drivers hot just doesn't work very well when driving multiple parallel output pairs. Suppose you have a driver bias resistor of 10 ohms, giving a standing bias current of around 130mA. That can be considered reasonably hot.

Suppose the signal voltage is swinging in the negative direction, through the zero crossover. The NPN driver transistor will begin to turn off and the suck-out base current for the NPN power transistor will be provided by the PNP driver transistor, through that 10 ohm resistor.
That 10 ohm resistor ensures that the PNP driver cannot deliver a huge suck-out current. The only real cure here is to bypass it by a big cap, which is simple and effective.

These are good points, but the possible need for base stopper resistors is not a good reason to avoid using high-ft devices. Good layout, bypassing and at times base Zobel resistors minimize the need for base stopper resistors. They are undesirable in many ways, and one wants to minimize their necessary value.

Merry Christmas,

Bob
 
wahab,

LTspice hint: To get the simulated fT, just set up a simple biasing circuit that establishes the desired DC values of Vce and Ic. Do an operating point analysis (.OP), then View, SPICE error log. The error log will give you the simulated fT of the transistor. Assuming the data sheet is correct, if the simulated fT does not match the data sheet, then the model is in error.

This won't work for models that use .SUBCKT rather than .MODEL, such as the 2SC3281 posted earlier.

Also, OnSemi don't do the models themselves, but subcontract them out to a company that uses a tool called MODPEX for this. I'm not sure exactly what's going on with this situation, but many of these models are way off. My web site shows the models they provided as of late 2006, and the one for the MJL3281A has a simulated fT that's a factor of 6 lower than the data sheet at 100 mA quiescent current.
 
wahab,

LTspice hint: To get the simulated fT, just set up a simple biasing circuit that establishes the desired DC values of Vce and Ic. Do an operating point analysis (.OP), then View, SPICE error log. The error log will give you the simulated fT of the transistor. Assuming the data sheet is correct, if the simulated fT does not match the data sheet, then the model is in error.

This won't work for models that use .SUBCKT rather than .MODEL, such as the 2SC3281 posted earlier.

Also, OnSemi don't do the models themselves, but subcontract them out to a company that uses a tool called MODPEX for this. I'm not sure exactly what's going on with this situation, but many of these models are way off. My web site shows the models they provided as of late 2006, and the one for the MJL3281A has a simulated fT that's a factor of 6 lower than the data sheet at 100 mA quiescent current.

thank you andy,

i use symetrix, and i have the function..
what i was talking about was than rather using a fixed frequency of
1 MHZ and then measuring the current gain with a sweeping current,
i fixed the current and swept the frequency...

i ve got a function in th simulators that measure the bandwith of
a circuit in small signal conditions , and i measured the toshiba s
as significantly performing better..
this is also the case in transient measurements...
the onsemi s performs almost as well than the toshiba s
only if the source generator is very low impedance,
with base current capability of 1 A at least...in a real amp,
it would be a hard task for the drivers...

of course, i suspected the models,
i used yours that i grabbed here at DIY, and as the measures didn t
please me, i went to the MODPEX at onsemi s site, but the results were
more or less the same, noy matching what i was expecting..
i then went on to ask myself what was going on...

to my knowledge, the parameters that describe the bjts behaviors
and as used in models are linearization of nonlinear equations..
could it be all we measure is statistical solutions of tensors,
i mean, the transistors parameters are in fact operators ?...
 
Actually, taking a close look at the datasheets, 2SC5949 and the old 2SC3281 only differ by thermal resistance. :) All other parameters are the same. I'd guess 2SC5949 is the 2SC3281 die with the solder thickness improvement of the 2SC5200-generation devices.

This is precisely what I meant regarding my comment on 'modern Japanese BJTs' - they are really not that modern. The market driving forces that resulted in the original 2SA1302/2SC3281 are sadly long gone...
 
Focusing on so-called "switching times" for analog power amplifiers is just plain wrong. Those who ignore ft or underestimate its importance are likely to suffer more high-frequency distortion in their amplifiers - the sort of thing that gave many solid state amplifiers a bad rep long ago.

Merry Christmas
Bob

Often is not a matter of "ignoring" but just of accepting that is shared by convent! :). TODAY we CAN ignore (near safely) FTs; YESTERDAY we was CONSTRAINED to "ignore" FTs because also criyng desperately Ancient Greek or Chinese Mandarin don't change anything with bipolars, which was low Ft devices and and so remained at that time...

Hi
Piercarlo
 
This is precisely what I meant regarding my comment on 'modern Japanese BJTs' - they are really not that modern. The market driving forces that resulted in the original 2SA1302/2SC3281 are sadly long gone...

yes, there are definitly no more money to make on the high
definition audio...
a 9 channelS IC amp that will symplify the manufacturing of
the 1000 W (pmpo of course) 7.1 amps is surely already there...
 
to my knowledge, the parameters that describe the bjts behaviors and as used in models are linearization of nonlinear equations..
could it be all we measure is statistical solutions of tensors,
i mean, the transistors parameters are in fact operators ?...

To my knowledge, parameters of transistor are just "metaparameters" conceived to provide an understandable framework to an electronic engineer, which operates with resistance, conductances, capacitances, controlled (current) generators and so on. A complete understanding may be obtained only in a physical framework operated by electrical fields on charged particles, their speed and time of diffusion, effective mass, interaction with lattice structure of semiconductors and so on. Just an entirely different field of knowledge.
Spice models, is worth remembering it, are provided just as technical gadgets for enhancing customers favour about semiconductors producers but, from the latter viewpoint, are not conceived as a datasheet substitute, which parameters specified in the above wisdom (understandability by an electronic engineer etc.) are deriver from real seances of measure (or however extrapolated from real measured data), NOT from simulation. Rely on simulations only for some key parameters (especially related with transit times and high frequency behaviour) is, if not plainly wrong, very risky whatever simulation software is used (or at least: software derived from spice family. More accurate - and expensive! - software are available in field related to RF design - but i don't know much about other than their existence).

Piercarlo
 
i use symetrix, and i have the function..
what i was talking about was than rather using a fixed frequency of 1 MHZ and then measuring the current gain with a sweeping current, i fixed the current and swept the frequency...

That sounds okay. So you would simulate, say, Ic(Q1)/Ib(Q1)=beta as a function of frequency, assuming the transistor was Q1. The emitter must have an AC ground, and the collector must as well (not a collector resistor, just the power supply voltage source hooked up to the collector). That is, hfe is Ic/Ib with the values of the emitter and collector AC voltages with respect to ground set to zero. Then there's two ways you can calculate fT. One way is to find the DC value of beta, then the frequency where beta is 3 dB down from this value, and compute the product. That's fT. Another way is to find beta at some frequency where it's rolling off at -6 dB/oct, then take the product of beta at that frequency, times the frequency, and that should give you the same value of fT as the previous technique. When computed in either of these two ways, the value of fT should be the same, and should not depend on the impedance of the generator at all.

to my knowledge, the parameters that describe the bjts behaviors and as used in models are linearization of nonlinear equations..
could it be all we measure is statistical solutions of tensors, i mean, the transistors parameters are in fact operators ?...

The parameters as used by SPICE BJT models are all nonlinear parameters. fT is something that's calculated from the nonlinear parameters by linearizing the circuit about its operating point. This linearization starts with the fully nonlinear Gummel-Poon model, then computes the linearized model, called hybrid-pi, from that. The hybrid-pi model (the linearized model) is shown in figure 13 on this page. The formulas for computing all the linearized parameters from the nonlinear parameters are given in a book by Massobrio and Antognetti called Semiconductor Device Modeling with SPICE.
 
That sounds okay. So you would simulate, say, Ic(Q1)/Ib(Q1)=beta as a function of frequency, assuming the transistor was Q1. The emitter must have an AC ground, and the collector must as well (not a collector resistor, just the power supply voltage source hooked up to the collector). That is, hfe is Ic/Ib with the values of the emitter and collector AC voltages with respect to ground set to zero. Then there's two ways you can calculate fT. One way is to find the DC value of beta, then the frequency where beta is 3 dB down from this value, and compute the product. That's fT. Another way is to find beta at some frequency where it's rolling off at -6 dB/oct, then take the product of beta at that frequency, times the frequency, and that should give you the same value of fT as the previous technique. When computed in either of these two ways, the value of fT should be the same, and should not depend on the impedance of the generator at all.

[/i].

well that s almost what i made..
in fact, i sat Ic at a fixed 4A , a 5V Vce, and i used a sweeping ac voltage
source with a serial 2R to fix the impedance of the source, and i measured
the ac voltage gain in small signal condition...the results don t match the
Ft as measured with a fixed frequency and a sweeping current...
the circuit and curves are theses ones..
the vertical scale is the magnitude of the gain, not the output voltage..
 

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well that s almost what i made..
in fact, i sat Ic at a fixed 4A , a 5V Vce, and i used a sweeping ac voltage source with a serial 2R to fix the impedance of the source, and i measured the ac voltage gain in small signal condition...the results don t match the Ft as measured with a fixed frequency and a sweeping current...

To measure fT though, you'll need to look at the current gain Ic(Q1)/Ib(Q1), not voltage gain, and you'll need to set R2 (the collector resistor) to zero in your schematic. This is because hfe is defined as Ic/Ib with the AC component of the collector and emitter voltages set to zero. One need not excite the circuit with a current source to measure current gain. A voltage source will work just fine. Just enter Ic(Q1)/Ib(Q1) as the expression to plot. This works fine even with voltage source drive. I don't know about the other models, but if you use mine, the value of fT you compute should be pretty close to the corresponding fT value of the datasheet as long as the collector current is not too large (< 5A or so), and the Vce value is the same as the datasheet.

Another way of doing this is to put a voltage source at the base with a DC value of zero and an AC value of 1. At the emitter, use a DC current source of a value almost the same as the desired collector current. Bypass this current source with a very large capacitor, say 1 Farad, to ground. Connect the collector to the DC bias supply with no collector resistor. Then sweep the AC base voltage over frequency and plot Ic(Q1)/Ib(Q1) vs. frequency.

It's a mistake to assume the models from the manufacturers accurately reflect device performance. The reason I got into doing SPICE models was not that I thought it was a cool idea, but because I realized many of the vendors' models were completely wrong, sometimes by a surprisingly large amount. I realized this after checking the simulated data against the datasheet. Of course, one must assume the datasheets are correct, or else getting a good SPICE model becomes almost hopeless. That said, the Fairchild models seem pretty good in general. Not so with OnSemi though.
 
Hi,
frequency transition - the notional frequency where current gain* falls to unity at - 6db per octave from a certain point. The transition frequency needs to be vastly higher than the operating frequency.
*hf(ebc) - static value of forward current transfer ratio, output AC short-circuited (As Andy stated).

Some additional h parameters could be helpful to play with here, but those almost never are available.
 
To measure fT though, you'll need to look at the current gain Ic(Q1)/Ib(Q1), not voltage gain, and you'll need to set R2 (the collector resistor) to zero in your schematic. This is because hfe is defined as Ic/Ib with the AC component of the collector and emitter voltages set to zero. One need not excite the circuit with a current source to measure current gain. A voltage source will work just fine. Just enter Ic(Q1)/Ib(Q1) as the expression to plot. This works fine even with voltage source drive. I don't know about the other models, but if you use mine, the value of fT you compute should be pretty close to the corresponding fT value of the datasheet as long as the collector current is not too large (< 5A or so), and the Vce value is the same as the datasheet.

Another way of doing this is to put a voltage source at the base with a DC value of zero and an AC value of 1. At the emitter, use a DC current source of a value almost the same as the desired collector current. Bypass this current source with a very large capacitor, say 1 Farad, to ground. Connect the collector to the DC bias supply with no collector resistor. Then sweep the AC base voltage over frequency and plot Ic(Q1)/Ib(Q1) vs. frequency.

It's a mistake to assume the models from the manufacturers accurately reflect device performance. The reason I got into doing SPICE models was not that I thought it was a cool idea, but because I realized many of the vendors' models were completely wrong, sometimes by a surprisingly large amount. I realized this after checking the simulated data against the datasheet. Of course, one must assume the datasheets are correct, or else getting a good SPICE model becomes almost hopeless. That said, the Fairchild models seem pretty good in general. Not so with OnSemi though.

Here is a I(V1)/Ib(Q1) plot showing ft of 2SC3601 . It looks pretty close to
data sheet and has close to the specified 6dB/Oct beta roll off.

The spice model goes a bit astray in other areas though. If you increase
collector voltage the beta just increases almost in direct proportion (at
lower frequencies).

Secondly if you decrease collector voltage to saturated region, beta 'knee'
is a lot sharper and at a much lower vce than reality.

WRT your OP device spice models - A1!
Any chance of expanding the repetoire?

BTW - Happy xmas everyone :cheers:
 

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