JFETS in differential pairs.

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Could someone please help me understand how JFETS are biased when used in differential pairs?

I understood that they (N channel) needed to be biased so that the gate was negative relative to the source. I'm just having trouble getting my head around the whole notion of the LTP...:scratch:

Thanks for any sagely words, and for tolerating my ignorance. Enquiring minds really do want to know!

Paul.
 
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