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Better power MOSFET models in LTSpice
Better power MOSFET models in LTSpice
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Old 20th December 2014, 04:45 PM   #1
keantoken is offline keantoken  United States
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Default Better power MOSFET models in LTSpice

Links to improved models are at the end of this post.

Greetings and Merry Christmas. This post will be edited as better information is found.

In the latest update of LTSpice (version 4.22k) Mike has responded to requests from multiple people including Bob Cordell, Ian Hegglun and myself to improve the accuracy of the MOSFET model.

At low currents, lateral and vertical MOSFETs operate in what is called the subthreshold conduction region. In this region, Ids responds to Vgs exponentially like a diode, rising a decade for every so many mV (typically 60mV for Si diodes, but 200-300mV for MOSFETs).

Until now, LTspice has not modeled this region of operation well. Because class AB power amplifiers and low-power MOSFET buffers operate within or close to this region, many audio circuits were not modeled very well and the simulations did not agree well with real life, or had noisy results due to sharp edges in the derivative of the transconductance curve which caused an impulse whenever moving in and out of the subthreshold region.

At the same time, alternatives such as the EKV model did not do a good job at modeling the highly variable junction capacitances, where VDMOS is needed. Now that the VDMOS model has a good subthreshold conduction model it appears we can bake our cake and eat it too.

It was beginning to appear we would need to make complex and non-user-friendly subcircuit models to achieve this, but Mike has stepped up and improved the internal simulator model so that the improved models will integrate fully with LTSpice and be available in the model selector.

We don't know for sure yet exactly how accurate the subthreshold curve in this model is to real life, we will have to see as we go along.


Some things to keep in mind:
  • Current models without subthreshold conduction parameters will not automatically take advantage of the new model functionality.
  • The original 'subthres' parameter, is left in for models that still use the old subthreshold model. For new models ksubthres should be used. See below for some of Mike's actual comments on the model.
  • The 'ksubthres' parameter if present will determine subthreshold behavior and cause the 'subthres' parameter to be ignored.

I've attached an image that shows the effect of the 'ksubthres' parameter. The 'subthres' parameter works in a similar way, just using different values. According to the discussion on the LTSpice Yahoo group, 'ksubthres' should be used instead of 'subthres'.

The improvements in the model will be applicable to vertical (IRF240...) and lateral (ECX10N20...) MOSFETs and should be an improvement on even the best current models. If you can measure Ids vs. Vgs in the subthreshold region, it should be possible to augment current models with the new parameters. Needless to say, such models are in the works, but don't let that stop you from trying it out.

I've collected some of the comments made by Mike on the model:

Quote:
Originally Posted by Mike Engelhart

BTW, I've changed the device equations for VDMOS subthreshold. It uses
a new dimensionless parameter Ksubthres. It will accept the old parameter
and match Id at Vds=1V and Vgs-Vto=-1V. The new VDMOS equations should
be now be continuous in value and all derivatives everywhere. I changed
the subthreshold equations so that it would cooperate with another
undocumented parameter, theta, which adjusts mobility on Vgs.

--Mike

Subthres was a spline fit and how it fit depended on many things. Don't use it
any more. Use Ksubthres instead. Ksubthres remaps the Vgs numberline so that
that there's now a unified subthres, linear and triode region.

--Mike

Links to improved models:

Attached Images
File Type: png LTSpice_VDMOS-subthreshold-revision.png (10.6 KB, 2029 views)
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Last edited by keantoken; 29th September 2016 at 05:51 AM.
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Old 20th December 2014, 07:37 PM   #2
Bob Cordell is offline Bob Cordell  United States
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Quote:
Originally Posted by keantoken View Post
Greetings and Merry Christmas.

In the latest update of LTSpice (version 4.22k) Mike has responded to requests from multiple people including Bob Cordell, Ian Hegglun and myself to improve the accuracy of the FET model.

At low currents, lateral and vertical FETs operate in what is called the subthreshold conduction region. In this region, Vgs behaves like a diode, rising a certain voltage per decade of Id in logarithmic fasion.

Until now, LTspice has not modeled this region of operation well. Because class AB power amplifiers and low-power FET buffers operate within or close to this region, many audio circuits were not modeled very well and the simulations did not agree well with real life, or had noisy results due to sharp edges in the derivative of the transconductance curve which caused an impulse whenever moving in and out of the subthreshold region.

At the same time, alternatives such as the EKV model did not do a good job at modeling the highly variable junction capacitances, where VDMOS is needed. Now that the VDMOS model has a good subthreshold conduction model it appears we can bake our cake and eat it too.

It was beginning to appear we would need to make complex and non-user-friendly subcircuit models to achieve this, but Mike has stepped up and improved the internal simulator model so that the improved models will integrate fully with LTSpice and be available in the model selector.

We don't know for sure yet exactly how accurate the subthreshold curve in this model is to real life, we will have to see as we go along.


Some things to keep in mind:
  • Current models without subthreshold conduction parameters will not automatically take advantage of the new model functionality
  • The original 'subthres' parameter, if present, is all that's needed to model subthreshold conduction
  • There is a new parameter (undocumented as of yet), 'ksubthres' which if present will determine subthreshold behavior and cause the 'subthres' parameter to be ignored

I've attached an image that shows the effect of the 'ksubthres' parameter. The 'subthres' parameter works in a similar way, just using different values. This could help with optimizing parameter values. If the parameters fail to converge, you can use the other parameter instead which will have different interactions with the rest of the parameters.

The improvements in the model will be applicable to vertical (IRF240...) and lateral (ECX10N20...) FETs and should be an improvement on even the best current models. If you can measure Vgs in the subthreshold region, it should be possible to augment current models with the new parameters. Needless to say, such models are in the works, but don't let that stop you from trying it out.
Hi Keantoken,

Thanks for starting this thread. This improvement to the LTspice VDMOS model is really good news. As you know, I've been wrestling with this for quite some time in my MOSFET power amplifier distortion simulations - having had previously to use the EKV model.

We all owe a debt of gratitude to Mike Engeldardt for implementing this at our request.

Cheers,
Bob
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Old 20th December 2014, 09:35 PM   #3
dadod is offline dadod  Croatia
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Where we can find those models with new parameters?
Damir
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Old 20th December 2014, 09:44 PM   #4
keantoken is offline keantoken  United States
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A few people are working on them, but there's no guarantee as to when they will be available. It's not too hard once you know the process though.

Based on the discussion in the LTspice Yahoo group, the 'subthres' parameter shouldn't be used in new models, so I've updated the first post to reflect this.
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Old 21st December 2014, 01:41 PM   #5
keantoken is offline keantoken  United States
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I've updated the first post with some of Mike's comments on the model.
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Old 21st December 2014, 01:56 PM   #6
Mark Johnson is offline Mark Johnson  United States
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Better power MOSFET models in LTSpice
Quote:
Originally Posted by keantoken View Post
...In this region, Vgs behaves like a diode, rising a certain voltage per decade of Id in logarithmic fasion.
A tiny correction; this should say: ... In this region, the log(Ids) vs. Vgs curve resembles a diode curve, rising a certain number of decades of current per volt of Vgs

Quote:
Originally Posted by keantoken View Post
If you can measure Vgs in the subthreshold region, it should be possible
Another tiny correction; this should say: If you can measure Ids vs. Vgs in the subthreshold region, ...
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Old 21st December 2014, 02:07 PM   #7
keantoken is offline keantoken  United States
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Oops! You're right. I paraphrased it to make it more intuitive, to me at least.

Quote:
In this region, Ids responds to Vgs exponentially like a diode, rising a decade for every so many mV (the mV/decade slope varies between devices).
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Last edited by keantoken; 21st December 2014 at 02:09 PM.
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Old 21st December 2014, 03:01 PM   #8
RCruz is offline RCruz  Switzerland
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Better power MOSFET models in LTSpice
Thank you for opening this thread Kean.
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Old 21st December 2014, 05:09 PM   #9
Bob Cordell is offline Bob Cordell  United States
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Quote:
Originally Posted by keantoken View Post
Oops! You're right. I paraphrased it to make it more intuitive, to me at least.
While a diode or transistor forward voltage rises at about 60 mV/decade of current, the MOSFET Vgs characteristic rises typically at about 200-300 mV/decade of current in the subthreshold region.

Cheers,
Bob
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Old 24th December 2014, 03:03 AM   #10
Bob Cordell is offline Bob Cordell  United States
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Default Some tests of the new VDMOS model with ksubthres

I have conducted several simulations to compare the EKV models with the VDMOS models with the ksubthres paramter. These comparisons were conducted for the IRFP240 and IRFP9240 power MOSFETs.

The VDMOS models were created with the proper value of the ksubthres parameter to match the subthreshold behavior of the EKV models.

A zipped folder of the simulations and models is attached.

Simulations included log Id vs. Vgs, gm vs. Vgs, push-pull output stage wingspread for several bias currents, and output stage THD at a bias of 150mA.

Overall, I thought that the VDMOS model with the proper value of ksubthres matched the EKV model quite well.

I encourage you to run these ready-to-run simulations and see if I have overlooked any issues.

Cheers,
Bob
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File Type: zip ksubthres Test.zip (13.4 KB, 264 views)
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