Better power MOSFET models in LTSpice

Since I wasn't able to get to this, I talked to a friend and he was up to making the model. So here is the result:

*DN2540-Tjp VDMOS with subthreshold (c) Ian Hegglun Aug 2015
.model DN2540-Tjp VDMOS (Rg=1 Vto={-1.52-4.5m*(Tjp-25)} Lambda=6m
+ Rs={0.35*(1+3m*(Tjp-25))} Kp={800m/(1+6m*(Tjp-25))}
+ Ksubthres={0.11} Mtriode={0.35} Rd={6*(1+3m*(Tjp-25))}
+ Cgdmax=10p Cgdmin=1p a=0.25 Cgs=100p Cjo=200p
+ m=0.7 VJ=2.5 IS=4.0E-8 N=2.4 Rb=10 )

You must add

.param Tjp=25

to the schematic, where 25 is the junction temperature. So if you want to go to 50C junction temperature, change Tjp to 50.

If desired, I can post models for fixed temperatures with no need of the Tjp command, although it is easy to change the model yourself if you examine how Tjp is being used.
 
I am trying to tune the vdmos model parameters for measurement data of IRPF240 and IRFP9240 MOSFETs. Without the model equations the only way I have to do this is comparing simulation results to the measurement data. If I had the model equations, I could perform least-squares adjustment. Where might I find the model equations?
 
ksubthres is roughly equal to the subthreshold slope, but something like 10-20% smaller. In other words, if your FET has a subthreshold slope of 250mV/decade Id, then ksubthres would probably be somewhere from 0.2 to 0.225. No one is sure exactly which equations LTSpice uses. Your best bet is to ask Mike himself, with the email address provided in the Help menu of LTSpice.
 
Here are new models for the IRF640/9640! The usage is the same as the previous models. For the Tjp models, the Tjp parameter must be given on the schematic ('.param Tjp=75'). The 25C and 75C models represent 25C or 75C junction temperature, and can be used like any other MOSFET model.

Thanks to Bob Cordell for the capacitance parameters.

Code:
*VDMOS with subthreshold (c) Ian Hegglun Aug 2015
.model IRF640-25C VDMOS (Rg=5 Vto={4.30-6m} Lambda=3m
+ Rs={35m*(1+3.5m)} Kp={13.0/(1+8.8m)}
+ Ksubthres={0.23*(1+4m)} Mtriode={0.35} Rd={0.1*(1+5m)}
+ Cgdmax=2600p Cgdmin=10p a=0.35 Cgs=1250p Cjo=3000p 
+ m=0.75 VJ=5 IS=1n N=1.3 Rb=0.01 )

*VDMOS with subthreshold (c) Ian Hegglun Aug 2015
.model IRF9640-25C VDMOS (pchan Rg=6 Vto={-3.76+2.5m*} Lambda=4m
+ Rs={68m*(1+3m)} Kp={9.0/(1+3m)}
+ Ksubthres={0.2*(1+4m)} Mtriode={0.3} Rd={0.25*(1+9m)}
+ Cgdmax=1200p Cgdmin=15p a=0.26 Cgs=1130p Cjo=2070p 
+ m=0.75 VJ=2.5 IS=1p N=1.5 Rb=0.02 )

*VDMOS with subthreshold (c) Ian Hegglun Aug 2015
.model IRF640-75C VDMOS (Rg=5 Vto={4.30-6m*50} Lambda=3m
+ Rs={35m*(1+3.5m*50)} Kp={13.0/(1+8.8m*50)}
+ Ksubthres={0.23*(1+4m*50)} Mtriode={0.35} Rd={0.1*(1+5m*50)}
+ Cgdmax=2600p Cgdmin=10p a=0.35 Cgs=1250p Cjo=3000p 
+ m=0.75 VJ=5 IS=1n N=1.3 Rb=0.01 )

*VDMOS with subthreshold (c) Ian Hegglun Aug 2015
.model IRF9640-75C VDMOS (pchan Rg=6 Vto={-3.76+2.5m*50} Lambda=4m
+ Rs={68m*(1+3m*50)} Kp={9.0/(1+3m*50)}
+ Ksubthres={0.2*(1+4m*50)} Mtriode={0.3} Rd={0.25*(1+9m*50)}
+ Cgdmax=1200p Cgdmin=15p a=0.26 Cgs=1130p Cjo=2070p 
+ m=0.75 VJ=2.5 IS=1p N=1.5 Rb=0.02 )

*VDMOS with subthreshold (c) Ian Hegglun Aug 2015
.model IRF640-Tjp VDMOS (Rg=5 Vto={4.30-6m*(Tjp-25)} Lambda=3m
+ Rs={35m*(1+3.5m*(Tjp-25))} Kp={13.0/(1+8.8m*(Tjp-25))}
+ Ksubthres={0.23*(1+4m*(Tjp-25))} Mtriode={0.35} Rd={0.1*(1+5m*(Tjp-25))}
+ Cgdmax=2600p Cgdmin=10p a=0.35 Cgs=1250p Cjo=3000p 
+ m=0.75 VJ=5 IS=1n N=1.3 Rb=0.01 )

*VDMOS with subthreshold (c) Ian Hegglun Aug 2015
.model IRF9640-Tjp VDMOS (pchan Rg=6 Vto={-3.76+2.5m*(Tjp-25)} Lambda=4m
+ Rs={68m*(1+3m*(Tjp-25))} Kp={9.0/(1+3m*(Tjp-25))}
+ Ksubthres={0.2*(1+4m*(Tjp-25))} Mtriode={0.3} Rd={0.25*(1+9m*(Tjp-25))}
+ Cgdmax=1200p Cgdmin=15p a=0.26 Cgs=1130p Cjo=2070p 
+ m=0.75 VJ=2.5 IS=1p N=1.5 Rb=0.02 )
 

Attachments

  • Hegglun_IRF640-IRF9640-VDMOS-Tjp-models_23-Oct-2015.txt
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ksubthres is roughly equal to the subthreshold slope, but something like 10-20% smaller. In other words, if your FET has a subthreshold slope of 250mV/decade Id, then ksubthres would probably be somewhere from 0.2 to 0.225. No one is sure exactly which equations LTSpice uses. Your best bet is to ask Mike himself, with the email address provided in the Help menu of LTSpice.


I found these lecture notes about"The MOS Transistor in Weak Inversion",
which discusses the EKV model on pages 13&14 including the subthreshold calculations: http://www.ece.utah.edu/~harrison/ece5720/Subthreshold.pdf
 
Hello. Finally I am able to make an update. Here are models for the Alfet/Exicon/Semelab 10x20 and 20x20 lateral MOSFETs. These models might not be absolutely perfect, but they've really been through the wringer! These are even more special because they use inline calculation to accurately model temperature effects.

The first set of models with the 'Tjp' suffix use the Tjp parameter to adjust the model for a specific temperature.

To use these models, you will have to add to your simulation the parameter:

.param Tjp=Temp

to your schematic. 'Temp' is the global variable LTSpice uses for temperature. It is 27C by default. If you want to run the simulation with these models at 75C instead, use

.param Tjp=75C

The next set of models with the 75C suffix are fixed at 75C and don't use or require the Tjp parameter. There are drop-in models and don't need any special treatment.

Code:
*
*		MOSFET VDMOS Models with ksubthres
*
*
*10N20-Tjp VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 10N20-Tjp VDMOS (Rg=60 Vto={0.17-1.6m*(Tjp-25)} Lambda=3m
+ Rs={0.245*(1+2.6m*(Tjp-25))} Kp={1.30/(1+8.3m*(Tjp-25))}
+ Ksubthres={0.095*(1+2.9m*(Tjp-25))} Mtriode=0.3 Rd={0.6*(1+3m*(Tjp-25))}
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH150521)
*
*
*
*10P20-Tjp VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 10P20-Tjp VDMOS (pchan Rg=60 Vto={-0.535+1.7m*(Tjp-25)} 
+ Rs={0.37*(1+3.4m*(Tjp-25))} Kp={0.995/(1+6.7m*(Tjp-25))} Rd=0.2
+ Ksubthres={0.12*(1+3.1m*(Tjp-25))} Mtriode=0.4 Lambda=5m
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH150521)
*
*
*
*20N20-Tjp VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 20N20-Tjp VDMOS (Rg=30 Vto={0.155-1.6m*(Tjp-25)}
+ Rs={0.12*(1+2.5m*(Tjp-25))} Kp={2.40/(1+7.4m*(Tjp-25))}
+ Ksubthres={0.09*(1+1m*(Tjp-25))} Mtriode=0.3  Rd=0.16 Lambda=3m
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1200p Cjo=2200p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH150521)
*
*
*
*20P20-Tjp VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 20P20-Tjp VDMOS (pchan Rg=30 Vto={-0.61+2.2m*(Tjp-25)} 
+ Rs={0.17*(1+2.0m*(Tjp-25))} Kp={1.85/(1+8.4m*(Tjp-25))} 
+ Ksubthres={0.105*(1+5m*(Tjp-25))} Mtriode=0.35 Rd=0.05 Lambda=5m
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1200p Cjo=2200p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH150521)
*
*
**************************************************************
*10N20-75C VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 10N20-75C VDMOS (Rg=60 Vto=0.09 Lambda=3m 
+ Rs=0.277 Kp=0.92 Rd=0.7 Ksubthres=0.11 Mtriode=0.3  
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH150521)
*
*
*
*10P20-75C VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 10P20-75C VDMOS (pchan Rg=60 Vto=-0.45 Lambda=5m 
+ Rs=0.432 Kp=0.745 Rd=0.2 Ksubthres=0.14 Mtriode=0.4   
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH150521)
*
*
*
*20N20-75C VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 20N20-75C VDMOS(Rg=30 Vto=0.076 Lambda=3m 
+ Rs=0.135 Kp=1.75 Rd=0.16 Ksubthres=0.095 Mtriode=0.3 
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1200p Cjo=2200p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH150521)
*
*
*
*20P20-75C VDMOS with subthreshold (c) Ian Hegglun 21 May 2015
.model 20P20-75C VDMOS (pchan Rg=30 Vto=-0.500 Lambda=5m
+ Rs=0.187 Kp=1.304 Ksubthres=0.13 Mtriode=0.35 Rd=0.05
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1200p Cjo=2200p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH150521)
*
*
********************************************************

How accurate is Cgd Cgs Cjo of 10N20-75C and 10P20-75C, given that data (taken from data sheet) shows ECX10P20 to have roughly twice the capacitance of ECX10N20?
Your values are identical for N and P
 
Well spotted.
This is why simulation often gives unrealistic levels of distortion. N and P or npn and pnp complementary devices are never as close as as most simulation models assume

Nowadays it's hard to get N/P copies unless you use those models or use the perfect simulator defaults, so it's actually pretty unlikely to have this problem in simulation. That said, people who make models for audio amps tend to pick matched transistors to base them on, so some of the models floating around match closer than you would expect out of the box. Still, there are a lot of other distortion mechanisms that can dominate even if the transistors are matched. In practice you want to look at more than transistor matching to lower overall distortion in an amplifier.
 
Nowadays it's hard to get N/P copies unless you use those models or use the perfect simulator defaults, so it's actually pretty unlikely to have this problem in simulation. That said, people who make models for audio amps tend to pick matched transistors to base them on, so some of the models floating around match closer than you would expect out of the box. Still, there are a lot of other distortion mechanisms that can dominate even if the transistors are matched. In practice you want to look at more than transistor matching to lower overall distortion in an amplifier.

Well stated.

Although generalizing can be dangerous, N/P mismatch will often lead more to even-order harmonics. Also, with BJT output stages, people often match for beta, but the degree to which an amplifier is affected by N/P beta mismatch is often a strong function of the output stage topology. For example, a simple 2EF output stage is more affected by beta mismatch than a Triple.

Crossover distortion is one of the most insidious concerns, but the extent to which N/P matching reduces it is hard to predict. One can always say that matching can never hurt.

N/P matching for MOSFETs is more difficult, and usually can't really be done because of the physics of the devices. Matching Vgs of the N and P devices does virtually nothing for distortion in most MOSFET output stages. Note that this is not the same as the issue of matching among like-sex MOSFETs in multiple output pair stages. The more significant issue of N vs P MOSFETs is the amount of transconductance that each has at a given drain current.

Many MOSFET output stages do not employ source resistors because they are really not needed for the same reason as emitter resistors are used in BJT output stages. However, it has been my experience that sometimes adding small-value source resistors of different values for the N and P vertical MOSFET devices can help some. I discuss this in Chapter 11 of my book. It is certainly not a perfect solution, but it can help some. Small value in this context is less than 1 ohm.

Cheers,
Bob
 
Here are the corrected models and the same jig as before.

The use of the Tjp models is explained here:

http://www.diyaudio.com/forums/soft...-power-mosfet-models-ltspice.html#post4365741

Code:
*
*		MOSFET VDMOS Models with ksubthres
*For 25C
*
*10N20-25 VDMOS with subthreshold (c) Ian Hegglun 06 Dec 2015
.model 10N20-25 VDMOS (Rg=60 Vto={0.17-1.6m*0} Lambda=3m
+ Rs={0.245*(1+2.6m*0)} Kp={1.30/(1+8.3m*0)}
+ Ksubthres={0.095*(1+2.9m*0)} Mtriode=0.3 Rd={0.6*(1+3m*0)}
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH151206)
*
*
*
*10P20-25 VDMOS with subthreshold (c) Ian Hegglun 06 Dec 2015
.model 10P20-25 VDMOS (pchan Rg=60 Vto={-0.535+1.7m*0} 
+ Rs={0.37*(1+3.4m*0)} Kp={0.995/(1+6.7m*0)} Rd=0.2
+ Ksubthres={0.12*(1+3.1m*0)} Mtriode=0.4 Lambda=5m
+ Cgdmax=215p Cgdmin=10p a=0.25 Cgs=900p Cjo=1200p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH151206)
*
*
*
*20N20-25 VDMOS with subthreshold (c) Ian Hegglun 06 Dec 2015
.model 20N20-25 VDMOS (Rg=30 Vto={0.155-1.6m*0}
+ Rs={0.12*(1+2.5m*0)} Kp={2.40/(1+7.4m*0)}
+ Ksubthres={0.09*(1+1m*0)} Mtriode=0.3  Rd=0.16 Lambda=3m
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1200p Cjo=2200p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH151206)
*
*
*
*20P20-25 VDMOS with subthreshold (c) Ian Hegglun 06 Dec 2015
.model 20P20-25 VDMOS (pchan Rg=30 Vto={-0.61+2.2m*0} 
+ Rs={0.17*(1+2.0m*0)} Kp={1.85/(1+8.4m*0)} 
+ Ksubthres={0.105*(1+5m*0)} Mtriode=0.35 Rd=0.05 Lambda=5m
+ Cgdmax=430p Cgdmin=20p a=0.25 Cgs=1800p Cjo=2400p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH151206)
*
*
**************************************************************
* For 75C
*
*10N20-75 VDMOS with subthreshold (c) Ian Hegglun 06 Dec 2015
.model 10N20-75 VDMOS (Rg=60 Vto={0.17-1.6m*50} Lambda=3m
+ Rs={0.245*(1+2.6m*50)} Kp={1.30/(1+8.3m*50)}
+ Ksubthres={0.095*(1+2.9m*50)} Mtriode=0.3 Rd={0.6*(1+3m*50)}
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH151206)
*
*
*
*10P20-75 VDMOS with subthreshold (c) Ian Hegglun 06 Dec 2015
.model 10P20-75 VDMOS (pchan Rg=60 Vto={-0.535+1.7m*50} 
+ Rs={0.37*(1+3.4m*50)} Kp={0.995/(1+6.7m*50)} Rd=0.2
+ Ksubthres={0.12*(1+3.1m*50)} Mtriode=0.4 Lambda=5m
+ Cgdmax=215p Cgdmin=10p a=0.25 Cgs=900p Cjo=1200p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH151206)
*
*
*
*20N20-75 VDMOS with subthreshold (c) Ian Hegglun 06 Dec 2015
.model 20N20-75 VDMOS (Rg=30 Vto={0.155-1.6m*50}
+ Rs={0.12*(1+2.5m*50)} Kp={2.40/(1+7.4m*50)}
+ Ksubthres={0.09*(1+1m*50)} Mtriode=0.3  Rd=0.16 Lambda=3m
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1200p Cjo=2200p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH151206)
*
*
*
*20P20-75 VDMOS with subthreshold (c) Ian Hegglun 06 Dec 2015
.model 20P20-75 VDMOS (pchan Rg=30 Vto={-0.61+2.2m*50} 
+ Rs={0.17*(1+2.0m*50)} Kp={1.85/(1+8.4m*50)} 
+ Ksubthres={0.105*(1+5m*50)} Mtriode=0.35 Rd=0.05 Lambda=5m
+ Cgdmax=430p Cgdmin=20p a=0.25 Cgs=1800p Cjo=2400p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH151206)
*
*
********************************************************
*		MOSFET VDMOS-Tjp Models with ksubthres
*
*
*10N20-Tjp VDMOS with subthreshold (c) Ian Hegglun 06 Dec 2015
.model 10N20-Tjp VDMOS (Rg=60 Vto={0.17-1.6m*(Tjp-25)} Lambda=3m
+ Rs={0.245*(1+2.6m*(Tjp-25))} Kp={1.30/(1+8.3m*(Tjp-25))}
+ Ksubthres={0.095*(1+2.9m*(Tjp-25))} Mtriode=0.3 Rd={0.6*(1+3m*(Tjp-25))}
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH151206)
*
*
*
*10P20-Tjp VDMOS with subthreshold (c) Ian Hegglun 06 Dec 2015
.model 10P20-Tjp VDMOS (pchan Rg=60 Vto={-0.535+1.7m*(Tjp-25)} 
+ Rs={0.37*(1+3.4m*(Tjp-25))} Kp={0.995/(1+6.7m*(Tjp-25))} Rd=0.2
+ Ksubthres={0.12*(1+3.1m*(Tjp-25))} Mtriode=0.4 Lambda=5m
+ Cgdmax=215p Cgdmin=10p a=0.25 Cgs=900p Cjo=1200p  
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 mfg=IH151206)
*
*
*
*20N20-Tjp VDMOS with subthreshold (c) Ian Hegglun 06 Dec 2015
.model 20N20-Tjp VDMOS (Rg=30 Vto={0.155-1.6m*(Tjp-25)}
+ Rs={0.12*(1+2.5m*(Tjp-25))} Kp={2.40/(1+7.4m*(Tjp-25))}
+ Ksubthres={0.09*(1+1m*(Tjp-25))} Mtriode=0.3  Rd=0.16 Lambda=3m
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1200p Cjo=2200p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH151206)
*
*
*
*20P20-Tjp VDMOS with subthreshold (c) Ian Hegglun 06 Dec 2015
.model 20P20-Tjp VDMOS (pchan Rg=30 Vto={-0.61+2.2m*(Tjp-25)} 
+ Rs={0.17*(1+2.0m*(Tjp-25))} Kp={1.85/(1+8.4m*(Tjp-25))} 
+ Ksubthres={0.105*(1+5m*(Tjp-25))} Mtriode=0.35 Rd=0.05 Lambda=5m
+ Cgdmax=430p Cgdmin=20p a=0.25 Cgs=1800p Cjo=2400p 
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 mfg=IH151206)
*
*
**************************************************************
 

Attachments

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Last edited: