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Better power MOSFET models in LTSpice
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Old 3rd March 2016, 12:46 AM   #141
keantoken is offline keantoken  United States
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Sorry, there was a mistake in the IRF640/9640 models. Here are the corrected models:

Code:
*VDMOS with subthreshold (c) Ian Hegglun Aug 2015
.model IRF640-25C VDMOS (Rg=5 Vto={4.30-6m*0} Lambda=3m
+ Rs={35m*(1+3.5m*0)} Kp={13.0/(1+8.8m*0)}
+ Ksubthres={0.23*(1+4m*0)} Mtriode={0.35} Rd={0.1*(1+5m*0)}
+ Cgdmax=2600p Cgdmin=10p a=0.35 Cgs=1250p Cjo=3000p 
+ m=0.75 VJ=5 IS=1n N=1.3 Rb=0.01 )

*VDMOS with subthreshold (c) Ian Hegglun Aug 2015
.model IRF9640-25C VDMOS (pchan Rg=6 Vto={-3.76+2.5m*0} Lambda=4m
+ Rs={68m*(1+3m*0)} Kp={9.0/(1+3m*0)}
+ Ksubthres={0.2*(1+4m*0)} Mtriode={0.3} Rd={0.25*(1+9m*0)}
+ Cgdmax=1200p Cgdmin=15p a=0.26 Cgs=1130p Cjo=2070p 
+ m=0.75 VJ=2.5 IS=1p N=1.5 Rb=0.02 )

*VDMOS with subthreshold (c) Ian Hegglun Aug 2015
.model IRF640-75C VDMOS (Rg=5 Vto={4.30-6m*50} Lambda=3m
+ Rs={35m*(1+3.5m*50)} Kp={13.0/(1+8.8m*50)}
+ Ksubthres={0.23*(1+4m*50)} Mtriode={0.35} Rd={0.1*(1+5m*50)}
+ Cgdmax=2600p Cgdmin=10p a=0.35 Cgs=1250p Cjo=3000p 
+ m=0.75 VJ=5 IS=1n N=1.3 Rb=0.01 )

*VDMOS with subthreshold (c) Ian Hegglun Aug 2015
.model IRF9640-75C VDMOS (pchan Rg=6 Vto={-3.76+2.5m*50} Lambda=4m
+ Rs={68m*(1+3m*50)} Kp={9.0/(1+3m*50)}
+ Ksubthres={0.2*(1+4m*50)} Mtriode={0.3} Rd={0.25*(1+9m*50)}
+ Cgdmax=1200p Cgdmin=15p a=0.26 Cgs=1130p Cjo=2070p 
+ m=0.75 VJ=2.5 IS=1p N=1.5 Rb=0.02 )

*VDMOS with subthreshold (c) Ian Hegglun Aug 2015
.model IRF640-Tjp VDMOS (Rg=5 Vto={4.30-6m*(Tjp-25)} Lambda=3m
+ Rs={35m*(1+3.5m*(Tjp-25))} Kp={13.0/(1+8.8m*(Tjp-25))}
+ Ksubthres={0.23*(1+4m*(Tjp-25))} Mtriode={0.35} Rd={0.1*(1+5m*(Tjp-25))}
+ Cgdmax=2600p Cgdmin=10p a=0.35 Cgs=1250p Cjo=3000p 
+ m=0.75 VJ=5 IS=1n N=1.3 Rb=0.01 )

*VDMOS with subthreshold (c) Ian Hegglun Aug 2015
.model IRF9640-Tjp VDMOS (pchan Rg=6 Vto={-3.76+2.5m*(Tjp-25)} Lambda=4m
+ Rs={68m*(1+3m*(Tjp-25))} Kp={9.0/(1+3m*(Tjp-25))}
+ Ksubthres={0.2*(1+4m*(Tjp-25))} Mtriode={0.3} Rd={0.25*(1+9m*(Tjp-25))}
+ Cgdmax=1200p Cgdmin=15p a=0.26 Cgs=1130p Cjo=2070p 
+ m=0.75 VJ=2.5 IS=1p N=1.5 Rb=0.02 )
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Last edited by keantoken; 3rd March 2016 at 12:50 AM.
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Old 3rd March 2016, 06:45 AM   #142
AndrewT is offline AndrewT  Scotland
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Hi Kean,
I see you have shown models for 25C and for 75C
What is Tjp?
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Old 3rd March 2016, 08:44 AM   #143
jan.didden is online now jan.didden  Europe
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Quote:
Originally Posted by AndrewT View Post
Hi Kean,
I see you have shown models for 25C and for 75C
What is Tjp?
Temp is parameterized - you will see in the model 'Tjp' which you can then specify in the sim so you can sim at any temp or at stepped temp.

Jan
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Old 3rd March 2016, 12:40 PM   #144
keantoken is offline keantoken  United States
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For the Tjp models you need to add

.param Tjp=25

to the schematic, where 25 is the temperature you want the devices to be modeled at. This is the same behavior as with all the other Tjp models.
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Old 13th March 2016, 06:39 AM   #145
davidsrsb is online now davidsrsb  Malaysia
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I just tried the 940/9640 models in a simple AB output with no feedback and found 10V peak ac driving +7.9, -7.6V into 1R. There is something wrong with the P channel model, giving an optimistic view of the Rds
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Old 13th March 2016, 12:27 PM   #146
keantoken is offline keantoken  United States
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By how much and at what Id/Vds? I just checked an it looks okay to me.
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Old 13th March 2016, 02:22 PM   #147
davidsrsb is online now davidsrsb  Malaysia
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Supply +/-20V, 1R load, 10V peak sine, 75C models, 3.5V bias on the 640, 3.25V on the 9640. No source resistors. This is just a model test
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Old 14th March 2016, 02:48 PM   #148
jackinnj is offline jackinnj  United States
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Better power MOSFET models in LTSpice
Quote:
Originally Posted by bimo View Post
I mean, can I use exicon mosfet in simulation but use 2KS1058/SJ162 in real amplifier? I'm worry about biasing the mosfet. But I can accept if the result have higher distortion.
The Renesas Lateral MOSFETs are pretty easy to work with, and while not as robust as the IRFP240/9240 they are somewhat self-limiting when they over-heat. Note that the pinout for the 2SJ162/K1058 is GSD while the IRFP's are GDS.

Weaver's contribution to the vacuum tube spice modelling thread -- pentode portion -- for those who like to play around with equations.
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Old 30th March 2016, 03:42 PM   #149
astx is offline astx  Austria
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Better power MOSFET models in LTSpice
Quote:
Originally Posted by keantoken View Post
Sorry, there was a mistake in the IRF640/9640 models. Here are the corrected models:
Dear keantoken,

are the models for original IR IRF640/9640 or are the models for Vishay types?
Could we use FQP19N20/FQP12P20 as replacement for IRF640/9640?

BR, Toni
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Old 30th March 2016, 08:33 PM   #150
keantoken is offline keantoken  United States
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They were based on the Vishay datasheets, but the graphs in those sheets are just redigitized versions of the graphs in the IR datasheets (common practice with many companies such as Fairchild, OnSemi, etc.). So I would consider them IR models.

I would think most audio amps could be adjusted to accept almost any MOSFETs, and I don't see any reason the FQP's would blow up. That's the most I can say since I've never tested those MOSFETs.
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