Better power MOSFET models in LTSpice

UltimateX86 · 2019-04-25 7:48 am

IanHegglun said:
Converted to VDMOS:

*VDMOS with subthreshold (c) Ian Hegglun Apr 2019
.model ZVP2110G VDMOS (pchan Rg=65 Vto={-(2.8-6m*(temp-25))} Lambda=6m
+ Rs={2*(1+3.5m*(temp-25))} Kp={0.17/(1+8.8m*(temp-25))}
+ Ksubthres={0.15*(1+4m*(temp-25))} Mtriode=0.5 Rd={2.5*(1+5m*(temp-25))}
+ Cgdmax=20p Cgdmin=3p a=0.5 Cgs=140p Cjo=60p Tnom=Temp
+ m=0.5 Vj=0.75 N=3 Is=5p Rb=1 Vds=-100 Ron=8 Qg=2nC mfg=DioInc1904)

Thank you

Bob Cordell · 2019-04-25 11:57 am

Dave Zan said:
Hi Bob
Your book has ~-6 mV for the IRFP240 so I was curious if Ian's default was based on that or independently checked.

I don't plan to use any laterals but their tempco is of interest in as far as it illuminates the mechanisms involved.
I believe you are correct, the measured tempco is a function of the Rds tempco and Vgs tempco, and they move in opposite directions.
So the vertical MOSFET tempco is worse precisely because the Rds is smaller and it's positive tempco has less affect.
So if one wants the improved efficiency of the v.FETs then the increased tempco is more or less unavoidable.
At least that's as I understand it, I hoped someone would be able to quantify it before I do the bias spreader for a vFET amp.

Best wishes
David

Yes. See my paper "A MOSFET Power Amplifier with Error Correction" on my website, where I first tackled this issue. Although the TCvgs is larger than the TCvbe, it does not mean that the vertical MOSFETs are less temperature stable than BJTs, since their Vgs is larger and their transconductance is smaller. Vertical MOSFETs are actually more temperature stable than BJTs when used with a suitable bias spreader.

Cheers,
Bob

IanHegglun · 2019-04-25 10:43 pm

Dave Zan said:
I meet Mike E. next week, should I ask for the temperature coefficient to be available as a parameter?
Should be an easy code enhancement, save some complications.
Any other requests?.

Hi Dave,
Yes please! I suggest the same parameter as already in the jFET
"VtoTc = Threshold voltage temperature coefficient = V/°C"
For Kp I prefer "Bex" for the Kp exponent (default=1.5 already),
Since Mike has VtoTc=-1m he may prefer to leave the same default to avoid unexpected differences by users.

Other parameters that benefit from temp co's: Rs, Rd, ksubthres. Rb body diode temp co is not needed for linear audio amps but is needed if/when the body diode is to be modeled over temp.

I notice ngspice VDMOS model is being updated for temperature (link). Superspice VDMOS already has temp cos (MOS1 Model). Both are based on the same equations as LTspice VDMOS but have been enhanced for missing temp co parameters.

BTW Kevin Aylward added quasisaturation to his VDMOS at my request (equations in link above). I needed quasisaturation for simulating distortion in CMOS inverters for my Cube-law amp soft clipping and for simulating CMOS guitar effects 'stomp-box' soft clipping. Without quasisaturation the voltage gain and thd simulations were useless. I created subcircuits to add quasisaturation to the LTspice VDMOS. I am not asking Mike add quasisaturation as it is not needed for standard amplifier sims and I am happy to use subcircuits and it involves significantly more effort than adding the above temp co's. But it would be nice sometime in the future.

What's the reason to think 2 or 3 mV/K more likely in this case?
Any rule of thumb to correlate the Vto or the resistance of the FET, or whatever

Based on the IRFP240/9240 Fig 3 (or IRF640/9640) shows Zero Temp Co (ZTC) for the n-channel occurs at a lower Vgs and lower Id than the p-channel. See my white paper Part 2 p14 "Choosing the threshold voltage temperature coefficient using the 'ztc' point" VDMOS - PAK2 devo. The n-channel ztc is about 3 volts above Vto and the p-channel ztc is about 1.5 volts above it's Vto, so the VtoTc for the p should be half that of the n-channel. If this is typical for other VDMOS then the ZVP2110G can have more like 3mV/C.

All the best with Mike's meeting.

Dave Zan · 2019-05-03 1:56 pm

IanHegglun said:
...the same parameter as already in the jFET
"VtoTc...

OK, I talked to Mike and he was open to the idea of a VtoTc in VDMOS.
So send him an email and request it, so it's clear that it's not just the whim of one person.

Best wishes
David

Bob Cordell · 2019-05-03 3:37 pm

Sub-threshold conduction in JFETs

Although it is not very important in most JFET applications, it is worth noting that JFETs also exhibit sub-threshold conduction. I'm not campaigning for a sub-threshold parameter for JFETs, just say'n.

Cheers,
Bob

Dave Zan · 2019-05-03 4:31 pm

Bob Cordell said:
Although it is not very important in most JFET applications...JFETs also exhibit sub-threshold conduction...

Hi Bob
Have you looked for sub-threshold JFET behaviour in the latest LTSpice?
Mike mentioned that LTSpice had all the models smooth to ensure the solver always works nicely(unlike some other Spice variants)
A square law JFET would have I a smooth function of V, with a continuous but not smooth derivative.
I suppose that's sufficiently smooth but I wouldn't be surprised if there was some undocumented sub-threshold conduction.
Kind of late here to check, I just reached home, I hope Mike is closer next time.

Best wishes
David

Bob Cordell · 2019-05-03 7:25 pm

Dave Zan said:
Hi Bob
Have you looked for sub-threshold JFET behaviour in the latest LTSpice?
Mike mentioned that LTSpice had all the models smooth to ensure the solver always works nicely(unlike some other Spice variants)
A square law JFET would have I a smooth function of V, with a continuous but not smooth derivative.
I suppose that's sufficiently smooth but I wouldn't be surprised if there was some undocumented sub-threshold conduction.
Kind of late here to check, I just reached home, I hope Mike is closer next time.

Best wishes
David

Hi David,

The last time I simulated a JFET by itself in LTspice, the gm vs. Id curve was discontinuous, going straight to zero. But maybe there is some kind of subthreshold parameter in the LTspice model that I am unaware of.

Cheers,
Bob

IanHegglun · 2019-05-04 10:55 am

Dave Zan said:
OK, I talked to Mike and he was open to the idea of a VtoTc in VDMOS.
So send him an email and request it, so it's clear that it's not just the whim of one person.

Best wishes
David

Thanks Dave. I have sent an email to Mike.

BTW Re: jFET models. I have a subcircuit available that uses the VDMOS to model a jFET or SIT by adding a gate-source diode. The Mtriode parameter helps model some jFET's a lot. Also the Mu parameter (that I added) helps model the L1014D a lot.. Demo code can be copied from my paper and pasted into LTspice and should run..My paper is here SPICE models - PAK2 devo

Cheers,
IanH

IanHegglun · 2019-05-08 3:33 am

VDMOS temp co's are now available!

All,

The VDMOS model in LTspice is now updated with 6 temp co's for:

Bex Power of Kp temp dependence, default is -1.5
vtotc Vto tempco. If specified, the computation from 1st principles based on phi (-1mV/C) is ignored.
tksubthres1 linear tempco of Ksubthres
Trs1 Rs linear tempco
Trg1 Rg linear tempco
Trd1 Rd linear tempco
Trb1 Rb linear tempco

Update LTspice and you get the updated VDMOS model and the updated Help file.

Thanks Mike and Dave.

Cheers, :cheerful:

Ian Hegglun

Dave Zan · 2019-05-08 3:58 am

IanHegglun said:
The VDMOS model in LTspice is now updated with 6 temp co's...

Excellent, that made the trip even more worthwhile

Pretty impressive to receive the update to LTSpice so fast, not stuck on the to-do list for months.
And in the middle of a world tour.

Best wishes
David

mlloyd1 · 2019-05-16 12:20 pm

agreed!

what's even more impressive to me is it seems the LT SPICE engine is becoming more capable and sophisticated than the expen$ive fancy versions from (for example) Spectrum Software (Micro-Cap) and OrCAD (PSPICE)!

mlloyd1

Dave Zan said:
Excellent, that made the trip even more worthwhile
Pretty impressive to receive the update to LTSpice so fast, not stuck on the to-do list for months.
And in the middle of a world tour.

Best wishes
David

astx · 2019-05-16 8:30 pm

Looks like the open source ngspice developers have updated their VDMOS code too to be compatible with ltspice. This is an excerpt from current vdmos-thermal branch:

src/spicelib/devices/vdmos/vdmos.c
...
/* temperature dependency */
IOP( "tcvth", VDMOS_MOD_TCVTH, IF_REAL, "Linear Vth0 temperature coefficient"),
IOPR("vtotc", VDMOS_MOD_TCVTH, IF_REAL, "Linear Vth0 temperature coefficient"),
IOP( "mu", VDMOS_MOD_MU, IF_REAL, "Exponent of gain temperature dependency"),
IOPR("bex", VDMOS_MOD_MU, IF_REAL, "Exponent of gain temperature dependency"),
IOP( "texp0", VDMOS_MOD_TEXP0, IF_REAL, "Drain resistance rd0 temperature exponent"),
IOP( "texp1", VDMOS_MOD_TEXP1, IF_REAL, "Drain resistance rd1 temperature exponent"),
...

:up:

This is an excerpt from the commit log:

commit 7d948230d0a99c7ca08e7dc3a0ce3a4d538201d6 (HEAD -> vdmos-thermal, origin/vdmos-thermal)
Author: dwarning <dwarning>
Date: Sat May 11 18:11:56 2019 +0200
correct the gain temperature exponent to the usual MOSFET negative value
commit 69465c96b54cbfb9bf743d27d5fe9d6e41e6cf72
Author: dwarning <dwarning>
Date: Sat May 11 17:53:51 2019 +0200
clarify common usage of temperature parameters and introduce aliases for tcvth and mu

That's fast too - isn't it?

BR, Toni

bimo · 2019-05-21 9:02 am

Anyone have made 2SK1530/2SJ210 model with subthreshold?

UltimateX86 · 2019-05-27 9:16 am

Bonjour,

I planned to initially use Exicon for my Circlotron but I will have to turn to the mosfet that needs to be compensated in temperature: IRFP150n and the IRF9620, is it possible to have a VDMOS model or tell me a tutorial to do it myself ?

it is for this project :
VSSA Circlotron

thanks
Sébastien

http://www.vishay.com/docs/90308/sihf9520.lib
https://www.infineon.com/dgdl/irfp150n.spi?fileId=5546d462533600a40153572091643b38

IanHegglun · 2019-05-30 6:47 am

Hi All,

VDMOS IH & keantoken models updated with the new temp co parameters. Needs LTspice XVIII update after May 8, 2019.
Exicon laterals

Code:

*10N20 VDMOS + subthreshold (c) IanH & keantoken Jun 2019
.model 10N20 VDMOS (Rg=60 Vto=0.17 Kp=1.31 Lambda=3m
+ Rs=0.245 Ksubthres=0.095 Mtriode=0.3 Rd=0.6
+ Bex=-2 Vtotc=-1.6m ksubthres=0.095 Trs1=2.6m Trd1=3m
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 Vds=200 mfg=IHKT1906)

*10P20 VDMOS with subthreshold (c) IanH & keantoken Jun 2019
.model 10P20 VDMOS (pchan Rg=60 Vto=-0.535 Kp=0.98 Lambda=5m
+ Rs=0.37 Ksubthres=0.12 Mtriode=0.4 Rd=0.2
+ Bex=-2 Vtotc=+1.7m tksubthres1=3.1m Trs1=3.4m
+ Cgdmax=100p Cgdmin=5p a=0.25 Cgs=600p Cjo=1100p
+ m=0.7 VJ=2.5 IS=4.0E-6 N=2.4 Vds=200 mfg=IHKT1906)

****
*20N20 VDMOS with subthreshold (c) IanH & keantoken Jun 2019
.model 20N20 VDMOS (Rg=30 Vto=0.155 Kp=2.37 Lambda=3m
+ Rs=0.12 Ksubthres=0.09 Mtriode=0.3 Rd=0.16 
+ Bex=-1.9 Vtotc=-1.6m tksubthres1=1m Trs1=2.5m 
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1.2n Cjo=2.2n
+ m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 Vds=200 mfg=IHKT1906)

*20P20 VDMOS with subthreshold (c) IanH & keantoken Jun 2019
.model 20P20 VDMOS (pchan Rg=30 Vto=-0.61 Kp=1.82 Lambda=5m
+ Rs=0.17 Ksubthres=0.105 Mtriode=0.35 Rd=0.05
+ Bex=-2 Vtotc=+2.2m tksubthres1=5m Trs1=2m 
+ Cgdmax=200p Cgdmin=10p a=0.25 Cgs=1200p Cjo=2200p
 + m=0.7 VJ=2.5 IS=8.0E-6 N=2.4 Vds=200 mfg=IHKT1906)

IRFxxx

Code:

  *VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model IRFP240 VDMOS (Rg=5 Vto=4.0 Kp=6 Lambda=3m
+ Rs=40m Ksubthres=0.15 Mtriode=0.35 Rd=0.15 Rb=0.01
+ Bex=-2.3 Vtotc=-6m tksubthres1=4m Trs1=3.5m Trd1=5m
+ Cgdmax=2600p Cgdmin=10p a=0.35 Cgs=1250p Cjo=1000p
+ m=0.4 VJ=0.75 IS=1n N=1 Vds=200 Ron=0.15 Qg=45nC mfg=VishIH1906)

*VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model IRFP9240 VDMOS (pchan Rg=6 Vto=-3.76 Kp=9 Lambda=4m
+ Rs=64m Ksubthres=0.15 Mtriode=0.2 Rd=0.25  Rb=0.08
+ Bex=-2.3 Vtotc=+6m tksubthres1=4m Trs1=3.5m Trd1=5m
+ Cgdmax=1800p Cgdmin=50p a=0.5 Cgs=900p Cjo=1100p
+ m=0.5 Vj=0.75 N=3 Is=10p Vds=-200 Ron=0.5 Qg=44nC mfg=VishIH1906)

****
*VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model IRF610 VDMOS (Rg=5 Vto=4.30 Kp=0.5 Lambda=3m
+ Rs=35m Ksubthres=0.23 Mtriode=0.35 Rd=1 Rb=0.01
+ Bex=-2.4 Vtotc=-6m tksubthres1=4m Trs1=3.5m Trd1=5m
+ Cgdmax=260p Cgdmin=10p a=0.35 Cgs=125p Cjo=300p
+ m=0.75 VJ=5 IS=1n N=1.3 Vds=200 Ron=1.5 Qg=8nC mfg=IH1906)

*VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model IRF9610 VDMOS (pchan Rg=6 Vto=-3.76 Kp=0.35 Lambda=4m
+ Rs=68m Ksubthres=0.2 Mtriode=0.5 Rd=2 Rb=0.02
+ Bex=-1 Vtotc=+2.5m tksubthres1=4m Trs1=3m Trd1=9m
+ Cgdmax=120p Cgdmin=15p a=0.26 Cgs=113p Cjo=207p
+ m=0.75 VJ=2.5 IS=1p N=1.5 Vds=-200 Ron=3 Qg=11nC mfg=IH1906)

****
*VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model IRFP340 VDMOS (Rg=5 Vto=3.9 Kp=7.3 Lambda=3m
+ Rs=35m Ksubthres=0.15 Mtriode=0.2 Rd=0.3 Rb=0.1
+ Bex=-2.4 Vtotc=-6m tksubthres1=4m Trs1=3.5m Trd1=5m
+ Cgdmax=260p Cgdmin=10p a=0.35 Cgs=150p Cjo=300p
+ m=0.75 VJ=5 IS=1n N=1.3 Vds=400 Ron=0.5 Qg=62nC mfg=VishIH1906)

*VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model IRFP9140 VDMOS (pchan Rg=6 Vto=-3.76 Kp=12 Lambda=4m
+ Rs=35m Ksubthres=0.15 Mtriode=0.25 Rd=0.1 Rb=0.08
+ Bex=-2.4 Vtotc=+6m tksubthres1=4m Trs1=3.5m Trd1=5m
+ Cgdmax=1800p Cgdmin=50p a=0.5 Cgs=900p Cjo=1100p
+ m=0.5 Vj=0.75 N=3 Is=10p Vds=-100 Ron=0.2 Qg=61nC mfg=VishIH1906)

****************************************************************
*VDMOS with subthreshold (c) Ian Hegglun Junr 2019
.model IRF710 VDMOS (Rg=5 Vto=4.40 Kp=0.5 Lambda=3m
+ Rs=35m Ksubthres=0.23 Mtriode=0.2 Rd=3 Rb=0.1
+ Bex=-2.4 Vtotc=-6m tksubthres1=4m Trs1=3.5m Trd1=5m
+ Cgdmax=260p Cgdmin=10p a=0.35 Cgs=150p Cjo=300p
+ m=0.75 VJ=5 IS=1n N=1.3 Vds=400 Ron=3.6 Qg=17nC mfg=IH1906)

****************************************************************
*VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model IRF730 VDMOS (Rg=5 Vto=4.0 Kp=3.1 Lambda=2m
+ Rs=65m Ksubthres=0.2 Mtriode=0.9 Rd=0.7 Rb=0.01
+ Bex=-2.4 Vtotc=-6m ksubthres1=4m Trs1=3.5m Trd1=5m
+ Cgdmax=1.2n Cgdmin=5p a=0.25 Cgs=500p Cjo=300p
+ m=0.75 VJ=5 IS=1n N=1.3 Vds=400 Ron=1 Qg=38nC mfg=VishIH1906)

Other

Code:

 *VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model ZVP2110G VDMOS (pchan Rg=65 Vto=-2.8 Kp=0.17 Lambda=6m
+ Rs=2 Ksubthres=0.15 Mtriode=0.5 Rd=2.5 Rb=1
+ Bex=-2.3 Vtotc=+6m tksubthres1=4m Trs1=3.5m Trd1=5m
+ Cgdmax=20p Cgdmin=3p a=0.5 Cgs=140p Cjo=60p
+ m=0.5 Vj=0.75 N=3 Is=5p Vds=-100 Ron=8 Qg=2nC mfg=DioInc1906)

***************************************************************
*VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model VN88AFD VDMOS (Rg=1 Vto=1.25 Kp=0.41 Lambda=0m
+ Rs=3 Ksubthres=0.4 Mtriode=1 Rd=0.1 Rb=0.1
+ Bex=-2.4 Vtotc=-3.5m tksubthres1=1m Trs1=1m Trd1=1m
+ Cgdmax=10p Cgdmin=0.7p a=1 Cgs=35p Cjo=40p
+ m=0.75 VJ=5 IS=1p N=1.3 Vds=80 Ron=4 Qg=0.5nC mfg=VishIH1906)

***************************************************************
*VDMOS with subthreshold (c) Ian Hegglun and keantoken Jun 2019
.model LND150 VDMOS (Rg=100 Vto=-1.4 Kp=2.45m Lambda=1m
+ Rs=50 Ksubthres=0.095 Mtriode=1.1 Rd=300 Rb=10
+ Bex=-2.2 Vtotc=-0.4m tksubthres1=1m Trs1=3m Trd1=3m
+ Cgdmax=3p Cgdmin=2.7p a=0.25 Cgs=500p Cjo=15p  
+ m=0.7 VJ=2.5 IS=1E-30 N=2.4 mfg=IHKT1906)

****
*VDMOS with subthreshold (c) Ian Hegglun and keantoken Jun 2019
.model DN2540 VDMOS (Rg=1 Vto=-1.50 Kp=0.82 Lambda=8m
+ Rs=0.30 Ksubthres=0.11 Mtriode=0.8 Rd=10 Rb=0.2
+ Bex=-1.9 Vtotc=-0.8m tksubthres1=1m Trs1=3m Trd1=3m
+ Cgdmax=60p Cgdmin=1p a=0.1 Cgs=60p Cjo=170p 
+ m=0.75 VJ=0.75 IS=240p N=1.4 mfg=IHKT1906)

****
*VDMOS with subthreshold (c) Ian Hegglun and keantoken Jun 2019
.model DN2530 VDMOS (Rg=1 Vto=-1.5 Kp=0.82 Lambda=8m
+ Rs=0.30 Ksubthres=0.11 Mtriode=0.8 Rd=5 Rb=0.2
+ Bex=-1.9 Vtotc=-0.8m tksubthres1=4m Trs1=3m Trd1=3m
+ Cgdmax=60p Cgdmin=1p a=0.1 Cgs=60p Cjo=170p 
+ m=0.75 VJ=0.75 IS=240p N=1.4 mfg=IHKT1906)

keantoken · 2019-05-30 7:26 am

Thanks for getting Mike to reveal the tempcos and then simplifying the models. This is a great improvement.

Looking through the LTspice changelog, there is a lot of interesting activity. Linear Systems provided 123 Jfet models. Rohm offered some models as well. Here is a big one:

04/11/19 Added a B-source function, smallsig(), which returns 1. if a .ac or .noise simulation is going to be done after the .op.

IanHegglun · 2019-06-03 12:45 am

VDMOS 2SK1530, 2SJ201, IRFP150, IRF9620 all with ksubthres

bimo said:
Anyone have made 2SK1530/2SJ210 model with subthreshold?

Hi bimo,

VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model 2SK1530 VDMOS (Rg==20 Vto=1.65 Kp=11 Lambda=2m
+ Rs=80m ksubthres=0.1 Mtriode=0.35 Rd=0.1 Rb=0.02
+ Bex=-2 Vtotc=-1.6m tksubthres=0 Trs1=0m Trd1=3m
+ Cgdmax=1500p Cgdmin=15p a=0.33 Cgs=880p Cjo=1260p
+ m=0.68 VJ=2.5 IS=4.0E-06 N=2.4 Vds=200 Ron=0.2 mfg=IH1906)

*VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model 2SJ201 VDMOS (pchan Rg=10 Vto=-1.5 Kp=4.7 Lambda=2m
+ Rs=40m ksubthres=0.1 Mtriode=0.5 Rd=0.07 Rb=0.02
+ Bex=-1.5 Vtotc=+5m tksubthres1=0 Trs1=0m Trd1=3m
+ Cgdmax=3100p Cgdmin=55p a=0.34 Cgs=1500p Cjo=2800p
+ m=0.68 VJ=2.5 IS=4.0E-06 N=2.4 Vds=-200 Ron=0.15 mfg=IH1906)

Hi UltimateX86,

*VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model IRFP150 VDMOS (Rg=2 Vto=4.0 Kp=22 Lambda=3m
+ Rs=30m Ksubthres=0.15 Mtriode=0.35 Rd=30m Rb=0.01
+ Bex=-1.6 Vtotc=-6m tksubthres1=4m Trs1=3.5m Trd1=5m
+ Cgdmax=4.6n Cgdmin=100p a=0.35 Cgs=3n Cjo=4.6n
+ m=0.4 VJ=0.75 IS=1n N=1 Vds=100 Ron=50m Qg=140nC mfg=VishIH1906)

*VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model IRF9620 VDMOS (pchan Rg=5 Vto=-3.76 Kp=1.2 Lambda=3m
+ Rs=0.13 Ksubthres=0.15 Mtriode=0.5 Rd=1 Rb=0.1
+ Bex=-1.6 Vtotc=+3m tksubthres1=4m Trs1=3.5m Trd1=5m
+ Cgdmax=300p Cgdmin=20p a=0.2 Cgs=600p Cjo=500p
+ m=0.4 VJ=0.75 IS=1n N=1 Vds=-200 Ron=1.5 Qg=140nC mfg=VishIH1906)

bimo · 2019-06-03 2:25 am

IanHegglun said:
Hi bimo,

VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model 2SK1530 VDMOS (Rg==20 Vto=1.65 Kp=11 Lambda=2m
+ Rs=80m ksubthres=0.1 Mtriode=0.35 Rd=0.1 Rb=0.02
+ Bex=-2 Vtotc=-1.6m tksubthres=0 Trs1=0m Trd1=3m
+ Cgdmax=1500p Cgdmin=15p a=0.33 Cgs=880p Cjo=1260p
+ m=0.68 VJ=2.5 IS=4.0E-06 N=2.4 Vds=200 Ron=0.2 mfg=IH1906)

*VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model 2SJ201 VDMOS (pchan Rg=10 Vto=-1.5 Kp=4.7 Lambda=2m
+ Rs=40m ksubthres=0.1 Mtriode=0.5 Rd=0.07 Rb=0.02
+ Bex=-1.5 Vtotc=+5m tksubthres1=0 Trs1=0m Trd1=3m
+ Cgdmax=3100p Cgdmin=55p a=0.34 Cgs=1500p Cjo=2800p
+ m=0.68 VJ=2.5 IS=4.0E-06 N=2.4 Vds=-200 Ron=0.15 mfg=IH1906)

Thank you.

UltimateX86 · 2019-06-03 10:43 am

UltimateX86 said:
Bonjour,

I planned to initially use Exicon for my Circlotron but I will have to turn to the mosfet that needs to be compensated in temperature: IRFP150n and the IRF9620, is it possible to have a VDMOS model or tell me a tutorial to do it myself ?

it is for this project :
VSSA Circlotron

thanks
Sébastien

http://www.vishay.com/docs/90308/sihf9520.lib
https://www.infineon.com/dgdl/irfp150n.spi?fileId=5546d462533600a40153572091643b38

Hi Ian and thank you very much,

I'm confused, I put the right model spice in my post but not the good reference in the text, it is IRF9520

and for irfp it is the 150N and not the 150, which does not have the same characteristics

IRF9520
http://www.vishay.com/docs/90308/sihf9520.lib
IRFP150N
PDF
https://www.infineon.com/dgdl/irfp150npbf.pdf?fileId=5546d462533600a4015356286d121fd6
LIB
https://www.infineon.com/dgdl/irfp150n.spi?fileId=5546d462533600a40153572091643b38

On the other hand, you have already done other P mosfet that could serve, originally the IRF9520 had been chosen in VAS + a CCS to compensate with the temperature, now the VAS is bipolar so the IRF9520 is there that for ccs and compensation, there may be more suitable
https://circlotron.audio/data/simulation/img/j113.png

thanks

IanHegglun · 2019-06-05 5:35 am

UltimateX86 said:
Hi Ian and thank you very much,

I'm confused, I put the right model spice in my post but not the good reference in the text, it is IRF9520

and for irfp it is the 150N and not the 150, which does not have the same characteristics
...
thanks

No problem, here they are

*VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model IRF9520 VDMOS (pchan Rg=11 Vto=-3.76 Kp=3.5 Lambda=30m
+ Rs=0.16 Ksubthres=0.15 Mtriode=0.5 Rd=0.2 Rb=0.1
+ Bex=-1.6 Vtotc=+3m tksubthres1=4m Trs1=3.5m Trd1=5m
+ Cgdmax=700p Cgdmin=10p a=0.2 Cgs=250p Cjo=700p
+ m=0.4 VJ=0.75 IS=1n N=1 Vds=-200 Ron=1.5 Qg=18nC mfg=VishIH1906)

*VDMOS with subthreshold (c) Ian Hegglun Jun 2019
.model IRFP150N VDMOS (Rg=2 Vto=3.5 Kp=44 Lambda=3m
+ Rs=5m Ksubthres=0.15 Mtriode=1 Rd=20m Rb=0.01
+ Bex=-1.25 Vtotc=-4m tksubthres1=4m Trs1=3.5m Trd1=5m
+ Cgdmax=2n Cgdmin=100p a=0.35 Cgs=2n Cjo=2n
+ m=0.4 VJ=0.75 IS=1n N=1 Vds=100 Ron=30m Qg=90nC mfg=VishIH1906)

Better power MOSFET models in LTSpice

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