VBE Multiplier current compensation resistor
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Hello all,
Wondering if anyone has done tests to optimize the value of current compensation resistor (R39 on the attached schematic) to minimize the shift in amplifier bias setting with changes in the +B supply rail voltage. If so, what results were obtained. I just ran a real world test on various values of resistor ( 0 to 91ohms) and found the optimal value to be 36ohms, which is much higher than the conventionally suggested value of about 13ohms for the 10mA VAS current being used. Interestingly this agrees with the optimal value which my LTSpice simulations predicted while designing the amplifier. At that time I suspected my SPICE simulation was erroneous since it did not agree with what I read in certain books on amplifiers. 
One thing to bear in mind is that you should not be trying to make a bias generator that does not alter its voltage with current.
What is needed is a bias generator which when combined with the output stage, gives minimal variation in the output stage quiescent current when the supply voltage varies. It is a different target. 

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I did read your elaboration on that point last night (Self on Amplifiers v.6) and it sounds like it is not a simple matter to perform this optimization given the shifting points of driver/output devices with temperature variations. I will have to reread that section again (slowly) and plan how to proceed. 
The only sure way is to build it and measure it.
SPICE representation of Early effect (which is at the heart of this) is rudimentary. 
You are putting an impedance in series with something that is creating an exact voltage.
Surely that will make regulation poorer ? The aim is to keep the voltage the same. 
I assume with these kind of bias circuits that the dc current flowing through it is constant when no ac signal is applied to the input (or this Hawksford  Early effect would kick in; ref #5).
So the optimum value for the bias compensation is different from the power supply compensition value. These are different phenomena and one resistor cannot perform two duties at the same time. But it is very interesting indeed. How is the current through the bias circuit made? With an input differential and a accurate current source (ps independent), and a current mirror vas setup, one might expect a ps independent current running through the bias circuit. If it is not a current source but only a simple resistor, the current will drift with the ps. If no mirror is used but only a resistor, this current will drift too. With both resistors used, more drift will happen. A small drift in the first stage will be amplified in the second, the high gain vas. Can you show the rest of the circuit? By exchanging parts or segments of the complete circuit it could show less dependency of ps variation. The ideal would be to find the proper topology where R39 can remain the same 13Ω. And measure it after building it of course to verify the simulations! 
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Thank you Douglas for your reply. I have done just that with three values of resistor (16, 33 and 47 ohms) on a build of my current amplifier board and found the results to be pleasantly in line with what I observed in SPICE calculations and with a breadboard buildup of the VBE multiplier subcircuit alone. For my particular amplifier the optimal value for this resistor (R39 on my schematic) appears to be about 36ohms in all three cases. (I did not have a 36ohm resistor handy today). I apologize for the roughness of the data points in today's graph. They are actual measurements using the averaging function in my HP34401A DMM. (Please note the bias voltage levels (Yaxis) are in mV) I think perhaps the simple calculation sometimes used of R = intrinsic emitter resistance (re) * VBE multiplication factor (4 in my case for two stage EF output) needs to be rethought. I believe Douglas may have elaborated on this in a section is his tourdeforce on audio amplifiers Ver.6. I will have to reread this material tonight and see if this is the case. For now I will be moving back to determining optimal values for components integral to compensation. First the lowest value of Miller compensation capacitor consistent with stable operation, then optimal values for C1, C2 and R in order to jumper over to TMC (output inclusive) compensation. (PS I have no idea why my 2nd image keeps showing up upside down! ) 
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Thanks for the input. I have attached a picture of the whole schematic for one channel 
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