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NickKUK 12th December 2020 09:51 AM

Designing my headphone amp
So I will say nothing is 'new' and the designs and ideas are probably about there but I've been on a bit of a journey to understand the technology (tubes) understand the designs and the tools.

My guiding principles are:
* Low noise
* Tube stages - with a little help from solid state if needed.
* Headphones - capable of 32ohms
* Class A / AB1
* 6SN7 and 6AS7 based

Design topologies I've experiemented at in my earlier stages:
* SE 6SN7 -> 6AS7
* 6SN7 phase split using concertina -> 6AS7 PP
* 6SN7 input -> 6SN7 LTP -> 6AS7 PP
* 6SN7 other variants of 6SN7 drivers, differential amps, etc
* Negative feedback
* 6SL7 ..
* A 6SN7 version of Marcel's Valve DAC - including driving 6AS7 PP...

So from a LTSpice perspective I feed comfortable with the 6SN7 and 6AS7 and 'ideally' getting what I want...

So with the last piece it's got me thinking of the first stage - and how could I combine common components for the Valve DAC (requires six 6SN7 for both channels).

Then last night I thought - ignore everything you have done, focus on point 1 - noise. After reading around.. focusing on low noise designs for tube amps, removal of caps, reduction of resistors, paralleled tubes, differentials, and ensuring the majority of gain happens in one stage. Some of the ideas I was thinking about:
* Max 3 6SN7s - a total of 6 triodes available
* reduce resistors, capacitors in path
* Earliest gain possible
* Parallel - increase SNR
* Differential - reducing common noise
* Cascode - increasing gain without needing a coupling cap

I found a different back end stage - balanced but given the topology and the use of non-balanced headphones I would prefer PP with an output cap plus crowbar for safety.

So this morning I have decided on this topology:

The volume control is phase based.

I've just done the first run with some guesstimate non calculated cap and resistor values - even the bias on the tubes is not correct at the moment. However it looks promising:

So I think I will continue down the path of this topology as it's looking promising without correct values or negative feedback.

Any thoughts would be welcome.

NickKUK 12th December 2020 11:18 AM

I'll not have chance to play with the values until later tonight but I connected he NFB and upped the sim to 5 minutes.. took a slice from after it's stabilised.

I thought - god that's bad. Then I noted the scale on the side.. Think a little tweaking of the values should result in a nice 'ideal' topology..

80s-300s of the 5 min run:

NickKUK 12th December 2020 10:11 PM

Hmm looks like my opamp servo is causing an issue. I've removed it and with feedback this is what I'm getting. Still think there's more work that could result in a good amp.

Will run a higher resolution more accurate simulation overnight.

NickKUK 13th December 2020 03:24 PM

So I've I woke up at 4am and had a brainwave. This is all with the alternative solver and trol=7 for increased accuracy at the expense of speed.

That's not to shabby without feedback.

I've added a second coscode valve rather than attempting to use a bypass resistor to keep the current flowing. The output which is opposite phase is added to the other phase line - so more of the same noise exists on both phases. This also increases the bandwidth nicely - although I've increased the B+ to 600 to get the headroom to swing a cat..

I've also adjusted the coupling capacitors after checking the implied filtration caused by the coupling cap and the biasing circuit.

Edit I just noted the cascade grid isn't connected on this diagram - it is for the simulation.

NickKUK 13th December 2020 04:00 PM

U4 (signal) & U1 are a differential pair in a parallel formation with U5 & U2.
* Parallelled increases the signal to noise ratio, so less noise.
* this is a differential input stage and can be switched to take a balanced input from source, or, a single ended input as defined here. It outputs a differential - so it's the difference between the two outputs that is amplified, common signals such as the same noise are then cancelled out.

U6 is a cascode for U4 & U5, it increases the bandwidth but reduces the gain and peak to peak output, U10 is the 'anti'-cascode for U4 & U5 it's role is to pull current but instead of add signal, it's to provide the anti-phase signal and the noise from U4 & U5 etc to the anti-phase channel (U1... U7).

The front end is mirrored U1,U2,U3,U9, doing the same - except it's noise is copied across to the in-phase channel.

U7 and U8 are the output stage - as a push pull they will cancel out any common signals such as the same noise, and amplify the difference between the two phase channels as the output.

Volume control (R11, R12) works by allowing the phases to cancel each other out reduce the amplitude. It's current set to max volume.

NickKUK 13th December 2020 06:36 PM

1 Attachment(s)
Just been inspecting each of the wave forms for different areas of the circuit. Observations:

* U7 and U8, are showing a very very minor clipping - top and bottom at the tip of the wave, so this looks like a source for the odd harmonics. They need attention anyway as the bias is running at mA levels that would blow a tube (over 2x).
This is the obvious first port of call to tune again - every time I tune the front this needs tuning..

Attachment 901530

* the line near C6 in the servo is showing a faster slew rate on the from of the wave than the back of the wave. This is suggesting (a) phase and (b) the capacitor is holding too much charge/saturated so is slowing the slew rate. The output of the DC servo feeds the grid of the output on one side - thus this noise/problem is likely to make a larger impact (uncommon amplified) and not be cancelled out.
Not the immediate priority but one that is definitely on the list - possible solution is to inject the AC noise but not the DC bias to the other channel. Thus both would have noise and would cancel.

* I was wong - the sim had a non-connected grid and therefore one grid was showing nA and other was drawing 19mA through a 6SN7 - and the magic smoke would escape again. I'll reset this for the next run.

NickKUK 13th December 2020 11:02 PM

So I think the unequal bias resistance through the coupling cap are causing an imbalance - this shows up in the current flowing through the coupling caps. This causes noise and I suspect causes distortion/harmonics. The odd harmonics need non clipping symmetrical waveforms.

I’ve added bypass caps on the cascade and it’s improved the output, just waiting on an overnight run. Next focus is the bias of the 6as7 and output stage in general.

NickKUK 14th December 2020 05:51 AM

So sim finish - 96GB of data, 300s sim time, 8M-point FFT of 100-300s, zoomed in to the 10-20Khz region:

Hmm not as impressive as I'd hoped - -30dB seems the signal is getting hit harder than I thought, although I do have an idea to try around this. There's obviously a considerable harmonics 1st through 4th suggesting the basics aren't right (ie load lines).

Same run but FFT just of the signal side first stage before the coupling cap:

So there's signal at 0dB, 18Vpk-to-pk but low current. Just the second harmonic. Probably changing the resistance (Rload) on the other side of the coupling cap may help drive a better signal.

NickKUK 14th December 2020 06:34 AM

Just figured out that the C1 has ~280V pd across it, C2 has 400V due to the B- of the PP output stage. Now that would cause a problem too. Next up - see if we can do a B+ only push pull..

NickKUK 14th December 2020 07:49 AM

1 Attachment(s)
Hmm I think the filter I was using on the FFT is adding a lot of aliasing noise.

This is the front end with a simple dual Class A SE style loaded via cathode output - 12 seconds of sim time, 8M FFT as before (6AS7s running -18 bias):

Not bad - even puts out the right voltage and has masses of current in reserve.

Attachment 901682

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