Hi,
I have a CD player (Denon DCD755AR) with this digital filter and PCM1702 DACs. It has some issues with the laser pickup so I want to use it as a USB/SPDIF DAC. However, it uses a 384Fs system clock which I cannot use for example with PCM2706 or WM8804.
I didn't find any datasheet for the digital filter, only a block diagram without any pin description. I've looked at the schematics of a couple of CD players with SM5845 but they are all using 384Fs (16.9344MHz) clock.
Does somebody know if it is possible to configure the filter in 256Fs mode so I can supply it with a system clock from PCM2706 or WM8804?
Regards,
Plamen
I have a CD player (Denon DCD755AR) with this digital filter and PCM1702 DACs. It has some issues with the laser pickup so I want to use it as a USB/SPDIF DAC. However, it uses a 384Fs system clock which I cannot use for example with PCM2706 or WM8804.
I didn't find any datasheet for the digital filter, only a block diagram without any pin description. I've looked at the schematics of a couple of CD players with SM5845 but they are all using 384Fs (16.9344MHz) clock.
Does somebody know if it is possible to configure the filter in 256Fs mode so I can supply it with a system clock from PCM2706 or WM8804?
Regards,
Plamen
I see you've asked the same question over on Computer Audiophile but given them the benefit of the internal block diagram you've found.
From a quick look through the other chips in the SM584x family they generally have selectable clock frequencies between 192fs and 256fs or between 256fs and 384fs. On your block diagram pin40 (CKSLN) is the one to check - if its currently set to logic 1 you'll want to set it low. Or vice-versa. That should change from 384fs to 256fs in my estimation. This is only an educated guess mind based on similarities between your block diagram and those in the available DSs.
From a quick look through the other chips in the SM584x family they generally have selectable clock frequencies between 192fs and 256fs or between 256fs and 384fs. On your block diagram pin40 (CKSLN) is the one to check - if its currently set to logic 1 you'll want to set it low. Or vice-versa. That should change from 384fs to 256fs in my estimation. This is only an educated guess mind based on similarities between your block diagram and those in the available DSs.
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