Class-A Mosfet Headphone Amplifier

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Does not amplify (actually the gain is <1).
A more interesting, yet very simple approach, is a Zen-ish amp like:

srpp+%20mosfet%201.png



Of course, component values will need to be recalculated, for am HP amp.
 
I guess, but given the comparable simplicity, something like the Zen, allows you to change the gain by altering the feedback resistor (the 17k one in the schematic above).
So if tomorrow buys a new HP with different Z characteristics, he can still use the same amp.
And it is still a class A, if that is what the OP aimed for.

PS: There are also available PCBs and kits on eBay, for a Zen HP amp.
 
On the topic of the circuit originally suggested:
A Szekeres loaded with an LM317-based CCS at 250 mA, why not. As mentioned, it's clearly something for mains operation at half an amp of current draw (and requires adequate heatsinking if you do the math).

There are a few things I would definitely change about this one though. Here's the problems I spotted, which I think are fixable:
1. They specify a 10-20 V regulated supply partly because PSRR (power supply rejection) is not good. Assuming the bias pot is set to midpoint and a low-impedance source on the input, it's on the order of only 20 dB - that supply would have to be pretty darn clean indeed when you are planning to use typical 16 ohm earphones. That's the fault of the unfiltered input DC bias and highish source resistance.
2. Speaking of highish source impedance, I am not sure why that 4.7k series resistor is included at all, with a 150 ohm gate stopper already being present (which may or may not get the job done on its own, but would be easy to increase if needed). There is no filtering that would use it. Like this, its only function is to pointlessly increase high-frequency distortion (you want to drive MOSFETs with as low a source impedance as possible to minimize the effect of their parasitic capacitance), and reduce PSRR.
3. The pot for DC biasing is pretty quick'n'dirty breadboard DIY level and a more elaborate scheme would be advisable for the finished product. Adjustment range actually does not need to extend below Vgs,MOSFET + Vdrop,LM317 or about 4 V + 2 V ~= 6 V. As you can see, a 10 V supply would leave a maximum of about 4 V for Vdg, on 20 V it would be 14 V, which would reduce input capacitance nonlinearity quite a lot - or give room for much-improved level handling. (Best distortion for this kind of amp tends to be obtained when bias voltage is dialed down as far as voltage drop and signal peak amplitude will allow.) 20 V times 250 mA times 2 is 10 W, of course, plus power supply losses.

I therefore propose:
1. Remove 4.7k resistor and replace by direct connection
2. Remove the second 100k resistor (going to ground at 1 µF - pot wiper - 150R junction).
3. Between the pot wiper and 1 µF - 150R junction, add the following RCR filter components to clean up bias voltage:
* 100k series R
* about 10 µF (>= 25 V), going off to ground, polarity observing
* 100k series R
(one may have to go 2nd order but this should do)
4. Add a series resistor in the ground leg of the 100k adjustment pot. Depending on supply voltage to be used, this would range from about 150k @10V to 39k (43k) @20V. Compute as 100k * (6V / (V+ - 6 V)), with 6 V being the approximate minimum drop discussed above.

I would also use a bit more supply buffering than the single lonely 100n - current drawn is not, actually constant here (though relative variation would normally expected to be fairly small). Maybe an additional 22 µF per channel, and 470-1000 µF for both depending on your power supply.

Our RJM makes another sensible suggestion to further improve PSRR, namely having the MOSFET drain on the clean "ground" circuit node - even if that means you need a "Negative Nelly", err, negative voltage power supply if you want to stick with the n-channel MOSFET, otherwise you need a p-channel counterpart. Also observe the classic R/RC bias voltage filtering. I went for a slightly more complex variety because with a pot, filtering action would be heavily reduced or eliminated with the voltage turned all the way up.

To demonstrate the effect of this idea on PSRR, I re-reversed the "Reverso" (p-channel) version of the circuit, i.e. converted it from positive to negative supply so it's equivalent to a positive supply n-channel job. The result of both variations is attached. You can see that high-frequency PSRR is normally worsened by the effect of feedback capacitance (note the 1k input series resistor) when the FET drain is on the "dirty" power supply node. Towards the low frequencies we are also limited by maximum gain, being Av = gm * Rd = Id/Vt * Rd for a MOSFET amplifier. (An amplifier's gain makes a follower's PSRR.)

I am guessing there'll be more to be found on CCS-loaded Szekeres variations elsewhere.
 

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