balanced preamplifier based on LME49990
This is my diy project , based on LME49990 chip. I intend to improve it with your help , so any comments are welcome .
The features are : no capacitor in the signal path , DC Servo for each output stage , 12 db gain , drastic improvement of THD and S/N ratio through parallel connection of amplification circuits , and many others.
I still work on power supply module , unfortunately it`s not ready now.
More about , later . Ask me for any details .
The relays are NEC EA 2 , the connectors XLR and RCA are Neutrik .
It is equipped with display and remote control.
Now I'm working on the power supply. I think I'll post it here this weekend.
balanced preamplifier based on LME49990
Now I'm working on the power supply. I think I'll post it here this weekend .
The preamplifier is equipped with display and remote control, of course .
The relays are NEC EA 2 , and the connectors are Neutrik .
balanced preamplifier based on LME49990
the new design , improved a bit .
why, oh why sooo many OPamps? Have You got a discount on OPamps and decoupling caps?
If it doesn´t sing with a single Opamp it certainly won´t with tons of them :confused:
The rather lowohmic Volume Control certainly asks for a buffer stage that can supply for some mA of current. Especially if only the last stages to the right hand are engaged. Still though why not use a simple discrete or IC-Buffer instead of paralled OPamps?
You should check the volume control stages. In simulation the main 8 volume steps were already off of the desired values.
Bypass: -0,26dB Stage1: -0,77dB, Stage2: -1,21dB Stage3: -1,96dB Stage4: -3,13dB Stage5: -4,65dB Stage6: 6,39dB Stage7: -10,51dB Stage8: -31,11dB.
If more than 1 stage engages the steps get even more ´off´ of the design centre. These bit-wise weighted VCs require closely tolerated resistor values for precise and linear stepping. 1% Tolerance is already on the edge for 8 stages.
Input impedance varies widely, which is typical for this kind of circuit, but may become very low (17R5) and places an undue burden on the preceding Buffer stage.
Output impedance which may and should be designed to be constant varies with those values You have chosen.
From my experience You hardly need a gain of more than 2 (+6B) and certainly less than 3 (+10dB).
If You go parallel Opamp wise and low-impedance because of noise issues, why do You place the amplification at the end, where its noise contribution is highest? A gain-Buffer ahead of the VC and a simple output follower behind the VC should improve noise, since any noise generated in the gain stage will be attenuated by the VC.
Even a single LME49990 would probabely be transparent noisewise here.
And where is the sense in reducing already vanishingly low THD, which may only be of academical interest?
I also have my doubts, that THD will reduce.
Rather I assume that THD will rise in real world.
Just my 2C.
The δ1 Relay-based R-2R Stereo Attenuator
I just tested the attenuator and has the minimal value 1 kohm. It`s not too low for 3 op amp , I think .
Initially I wanted to use the LME49990 with buffer LME49610, but the system was unstable in the simulation, unlike lme49990 in parallel configuration .
Also , a much better solution is to have 6db at the input and 6 db at the output , instead of 0 db and 12 db . But you need far away too many resistors for that .Too complicated . Also with 12db on the first stage , and 2v input , you have to work with 8v , too much for a poor opamp.
I chose to have 12 db because it`s a normal value in commercial preamplifiers .
I like complicated stuff , I don`t want to see an empty case for my preamplifier . :)
Thanks for advices.
You didn´t test the VC shown in Your schematic. Your shematic´s relais are drawn wrong. See the position of the first parallel resistor (16k9) with closed relais contact! Drawn coorectly the attenuation steps are as supposed to be -more or less, depending on the precision tolerance of the resistors.
You need to take the 3pcs. of 50R resistors in the outputs of the input Buffer stage into account. The ~16R5 need to be added in calculation. All series resistors bypassed (lowest attenuation) the insertion loss will be -0.28dB with and -0.13dB without the 16R5.
Input impedance remains nearly constant at 1kR. Output impedance varies between ~330R and >600R.
I´d rather do it just the other way round. Fix the output impedance at a low level and accept a varying input impedance. As long as the input impedance remains min. 10x larger than the preceding Buffers output impedance there won´t be issues, but a low constant output impedance would allow to take the active stages out of the signal path alltogether and get a first class passive design without the problems of typical passive solutions, but all sonic benefits. ;)
Instability with current buffers within the feedback loop may occur with highspeed OPamps like the LME49990. Either use a ´slower´ OPamp or a small compensation cap or a small series resistor. See also fig.4 and associated text in the BUF634 Datasheet. National combined the 49600/49610 with the 49710 or 49860 which have just half the bandwidth of the 49990 and they also discuss possible solutions for HF-applications where oscillation may occur.
So Your simulation only prooves what could be expected anyway if the DS were read carefully. But it doesn´t show You possible problems of paralleled OPamps.
Anyway, with a 1k load a single LME49990 is fully sufficient, even if a full amplification factor of 4x would be used. The DS states >+-12V (8.5Vrms) output capability into 600R.
And no, splitting the gain is not "much better" here. If anyhow it´d only be very slightly better (in which respect anyway?). The only advantage as I see would be greater input overhead. But as I told before a gain of 4x won´t be needed, but 2x or max. 3x is fully sufficient. I´d think about using switchable gain of 2x and 3x.
Last point. The feedback network in the DC-Servoes is unusually lowohmic-highcapacitive. Typically the cap is chosen around 1µF to allow for a quality film cap. The resistor values then tyically range between 100k and 1Meg.
In this position a FET-input OPamp may be preferrable, since they perform with lower Offsets and generally better under high and vastly varying impedance-conditions.
ps. very last point. In praxis -1dB steps are small enough and a range of 0 to -63dB fully sufficient. Besides reducing complexity and cost, the tolerances of each added stage add up in deviation from the ideal value. Using 1% resistors a change for example from -31dB to -32dB may result not in another -1dB step, but may actually even increase volume level! The more steps You choose, the tighter tolerated the resistor need to be.
I also assume that You use kind of rotary switch and /or IR-commander to change volume.
It quickly becomes annoying if You need to turn the knob too often or need to press a button for ages.
Keep things reasonable and practicable.
not simulation, audio precision 2 and agilent measured reality
I can highly recommend the vishay soic8 package thin film resistor networks for the gain stages if you want to keep the CMRR and distortion low as possible.
Calvin , I just saw my mistake . Incredible!:)
Thank a lot , I must be more careful .
I`m thinking about what you said and I'll change tonight.
I want to send you something in private , it`s ok?
So , I updated the schematic . There is only 7 relays now , only 128 steps , one db each.
Also the amplification factor is now 6 db , instead of 12 db .
Now , about the noise . I think is the best to keep the buffer stage from the input at unity gain . In this way the noise will be minimum possible .
I have to analize now , if everything else it s ok , the Dc servo stage .
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