I have a satellite radio that is uses a CS4349 to do volume control and digital to analog conversion. I'm trying to use a twisted pear audio WM8804 board add digital output by converting I2S to S/PDIF.
I believe I need to configure the WM8804 for slave mode (AIF/MS L) and the receive source to the audio interface (TXSRC H). Since the CS4349 is configured for I2S with up to 24 bit data (DIF0 H, DIF1 L and DIF2 L) I configured the WM8804 for 24 bit I2S (AIFCONF1 L, AIFCONF0 H). The dip switches are right, left, right
and left.
Convenient test points on the tuner give access to SCLK (2.3 MHz):
LRCLK (44.1 KHz):
and SDIN:
I'm not having luck getting the WM8804 to sync up and haven't found any examples of folks using a W8804 to do I2S to S/PDIF conversion. What am I doing wrong? The CS3449 does not have a master clock input but do I need to supply this to the W8804? Is what I'm attempting even possible in hardware mode? Would I be better off using a CS8406 to do this?
I believe I need to configure the WM8804 for slave mode (AIF/MS L) and the receive source to the audio interface (TXSRC H). Since the CS4349 is configured for I2S with up to 24 bit data (DIF0 H, DIF1 L and DIF2 L) I configured the WM8804 for 24 bit I2S (AIFCONF1 L, AIFCONF0 H). The dip switches are right, left, right
and left.
Convenient test points on the tuner give access to SCLK (2.3 MHz):
LRCLK (44.1 KHz):
and SDIN:
I'm not having luck getting the WM8804 to sync up and haven't found any examples of folks using a W8804 to do I2S to S/PDIF conversion. What am I doing wrong? The CS3449 does not have a master clock input but do I need to supply this to the W8804? Is what I'm attempting even possible in hardware mode? Would I be better off using a CS8406 to do this?
All good questions, leres. I too have been attempting I2S>S/PDIF conversion using the TPA S/PDIF Transceiver module without success. And when you search on the net for info there is not much available that I can find. USB>I2S? Yep, lots on that. USB>S/PDIF? Yep, some on that too. But virtually nothing on what you and I are attempting. Odd. Some time ago I read the WM8804 manual over a few times and decided that what we want to accomplish is only do-able in software mode. But never got around to an implementation of same. In any event, leres, let's hope one or both of us will eventually succeed. -harry
What pins are you using for your I2S input?
I think that for the WM8804 to do what you want, you need to use
13, 14, 15 and 16 for your I2S input.
According to the Twisted Pear manual, configure as follows:
AIF/MS high (left)
TXSRC low (right)
AIFCONF1 high (left)
AIRCONF0 high (left)
DIN, BCLK, LRCLK and MCLK as inputs.
I think that for the WM8804 to do what you want, you need to use
13, 14, 15 and 16 for your I2S input.
According to the Twisted Pear manual, configure as follows:
AIF/MS high (left)
TXSRC low (right)
AIFCONF1 high (left)
AIRCONF0 high (left)
DIN, BCLK, LRCLK and MCLK as inputs.
I did it for a bit different task, but i've confirmed this setup worked for transferring of I2S into SPDIF too:
SPDIF Back Sync
Configuration:
SDIN (3, HW/SW) = 0 (Hardware mode configuration)
SCLK (1, AIF_MS) = 0 (Slave mode, MCLK is INPUT)
CSB (5, TXSRC) = 1 (Transmit from Data_IN)
AIF_CONF[0..1] is up to you. I have used "00" mode for I2S@16BIT, but it ate the I2S@24BIT from DIR9001. I haven't noticed the DIR9001 output format, as everything worked flawlessly from the first touch.
Oh, i know what's the problem. Your SCLK (MCLK) is only 64Fs.
AFAIK Wolfson wants 128/256Fs.
You've gotta pump it up with some *2 frequency multiplier and then try again...
SPDIF Back Sync
Configuration:
SDIN (3, HW/SW) = 0 (Hardware mode configuration)
SCLK (1, AIF_MS) = 0 (Slave mode, MCLK is INPUT)
CSB (5, TXSRC) = 1 (Transmit from Data_IN)
AIF_CONF[0..1] is up to you. I have used "00" mode for I2S@16BIT, but it ate the I2S@24BIT from DIR9001. I haven't noticed the DIR9001 output format, as everything worked flawlessly from the first touch.
Oh, i know what's the problem. Your SCLK (MCLK) is only 64Fs.
AFAIK Wolfson wants 128/256Fs.
You've gotta pump it up with some *2 frequency multiplier and then try again...
Last edited:
I realize that the original question is relatively old, but I have some suggestions on what to do.
I think that the WM8804 and the CS8406 both require a MCLK (called OMCK for the CS8406). I don't have experience with the WM8804, but I have worked with the CS8406. So I will take this as an example.
The OMCK can be either 128, 256 or 512 x the sample rate. These clocks can of course be generated from the SCLK by using a PLL with x2, x4 or x8 operation. A simpler design may also work OK. If 128x is chosen it can be generated from the SCLK by doubling the clock with an XOR gate plus an RC circuit with a suitable delay. If the duty cycle of the SCLK is 50% this will generate a nice x128 clock. Only one of the edges will be well defined though, since the one defined by the RC time constant may have more jitter.
Another potential issue is the serial format. The CS4349 can operate in different modes. If I2S is used the SPDIF transmitter should of course also be set up for I2S format. If it is a different format the SPDIF transmitter must of course also be set up for this other format, e.g. left justified. It is probably I2S though. If not, it will be very easy to hear once you get a signal through.
I think that the WM8804 and the CS8406 both require a MCLK (called OMCK for the CS8406). I don't have experience with the WM8804, but I have worked with the CS8406. So I will take this as an example.
The OMCK can be either 128, 256 or 512 x the sample rate. These clocks can of course be generated from the SCLK by using a PLL with x2, x4 or x8 operation. A simpler design may also work OK. If 128x is chosen it can be generated from the SCLK by doubling the clock with an XOR gate plus an RC circuit with a suitable delay. If the duty cycle of the SCLK is 50% this will generate a nice x128 clock. Only one of the edges will be well defined though, since the one defined by the RC time constant may have more jitter.
Another potential issue is the serial format. The CS4349 can operate in different modes. If I2S is used the SPDIF transmitter should of course also be set up for I2S format. If it is a different format the SPDIF transmitter must of course also be set up for this other format, e.g. left justified. It is probably I2S though. If not, it will be very easy to hear once you get a signal through.
I spent more time reading the WM8804 data sheet and can to the conclusion that you can't feed the WM8804 44.1 KHz in hardware mode. Maybe one day I'll try hooking a atmega328p up to it.
I was able to get a CS8406 working but I needed to find OMCK and feed that to the CS8406 in addition to SCLK, LRCLK and SDIN. I had a lot of dropouts but I think it was because I had wires everywhere and nothing was shielded. I'm going to wire up a permanent version this weekend and see if I can make it work better.
I was able to get a CS8406 working but I needed to find OMCK and feed that to the CS8406 in addition to SCLK, LRCLK and SDIN. I had a lot of dropouts but I think it was because I had wires everywhere and nothing was shielded. I'm going to wire up a permanent version this weekend and see if I can make it work better.
Good to hear you found a suitable clock for the OMCK and got it working.
It is important to wire it properly, since you can otherwise get a lot of ringing and noise on the clock and data signals. If you use a flat cable (IDC type) and use every 2nd wire as a ground wire, you should be able to get a stable operation. If you don't have this kind of cable, or don't want to use it, you can twist two wires for each signal and use one of the wires for ground, connected to ground at both ends.
It is important to wire it properly, since you can otherwise get a lot of ringing and noise on the clock and data signals. If you use a flat cable (IDC type) and use every 2nd wire as a ground wire, you should be able to get a stable operation. If you don't have this kind of cable, or don't want to use it, you can twist two wires for each signal and use one of the wires for ground, connected to ground at both ends.
I don't think you can handle 44.1 with the twisted pair audio WM8804 board in hardware mode if you're going to use its on-board 12 MHz oscillator. But you can if you're going to clock it with a different source (which is what I later figured out I needed to do).the wm8804/5 DOES support 44.1. it would have to, right?yes, in hw mode, not needing sw mode.
I have not used the TP board but I have built my own from perf and I used a 12mhz xtal, as exactly per the spec sheet (12 is the only choice you have in HW mode). I have not used sw mode yet but anything below and including 96k 'just automatically works' in hw mode.
maybe I got lucky with all the right i2s lines. I had to do zero work other than connect 3 clocks and 1 data to the chip, set it up as an spdif transmitter and whatever rate I put in from the audio widget, the wolfson obliged and I was able to see all the samplerates come out.
the chip is great for spdif tx.
its spdif-rx that it has limited success in, for hw mode and 176/192k.
but when you send it i2s, I have not found a SR that did not work, including 44.1
maybe I got lucky with all the right i2s lines. I had to do zero work other than connect 3 clocks and 1 data to the chip, set it up as an spdif transmitter and whatever rate I put in from the audio widget, the wolfson obliged and I was able to see all the samplerates come out.
the chip is great for spdif tx.
its spdif-rx that it has limited success in, for hw mode and 176/192k.
but when you send it i2s, I have not found a SR that did not work, including 44.1
I finally had a few minutes to play around and now that I know all 4 signals needed (serial data, serial clock, L/R clock and master clock) I was able to get both the cirrus CS8406 and the wolfson WM8804 to produce S/PDIF.
I've done some more work with my WM8804 circuit and have learned a couple of interesting things.
A new I2S source did not have master clock accessible but I was able generate it with a Cirrus CS2300-03 PLL clock multiplier. I multiplied the bit clock by 4 the WM8804 was happy to output S/PDIF.
One thing interesting about the first version of this circuit was that it did not include the 12 MHz crystal. This makes me wonder if S/PDIF re-clocking occurs when the input source is I2S.
Something I had a difficult time getting working was a "lock" LED. My read of the data sheet makes me believe the 4 status lines you have access to when operating in hardware mode (TRANS_ERR, GEN_FLAG, NON_AUDIO and UNLOCK) all apply to the S/PDIF input signal.
Today I got the idea to feed the generated S/PDIF output back to the the S/PDIF input. That worked! Well, it worked with my Twisted Pear S/PDIF transceiver module anyway. Figuring that the S/PDIF input logic needs the crystal, I added one and that allowed me to see all good status lines.
I've also been puzzled why NON_AUDIO is always indicated. I believe this is because PCM_N means non-PCM such as compressed, surround sound, Dolby, etc. is not detected when the chip is fed with PCM (and obviously no non-PCM formats are detected when there is no input).
Anyway, fun little chip!
A new I2S source did not have master clock accessible but I was able generate it with a Cirrus CS2300-03 PLL clock multiplier. I multiplied the bit clock by 4 the WM8804 was happy to output S/PDIF.
One thing interesting about the first version of this circuit was that it did not include the 12 MHz crystal. This makes me wonder if S/PDIF re-clocking occurs when the input source is I2S.
Something I had a difficult time getting working was a "lock" LED. My read of the data sheet makes me believe the 4 status lines you have access to when operating in hardware mode (TRANS_ERR, GEN_FLAG, NON_AUDIO and UNLOCK) all apply to the S/PDIF input signal.
Today I got the idea to feed the generated S/PDIF output back to the the S/PDIF input. That worked! Well, it worked with my Twisted Pear S/PDIF transceiver module anyway. Figuring that the S/PDIF input logic needs the crystal, I added one and that allowed me to see all good status lines.
I've also been puzzled why NON_AUDIO is always indicated. I believe this is because PCM_N means non-PCM such as compressed, surround sound, Dolby, etc. is not detected when the chip is fed with PCM (and obviously no non-PCM formats are detected when there is no input).
Anyway, fun little chip!
🎵 I2S to S/PDIF transmitter (V2.0) — DRIVE2 - v2.0 (toslink + coax + re_mclk)
🎵 I2S to S/PDIF transmitter (V1.1) — DRIVE2 - v1.1 (toslink)
Вывод оптики (S/PDIF) из PIONEER DEH-X5600BT — DRIVE2 - instructions for the withdrawal of toslink from the car audio pioneer deh x5600bt
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