Need help with Triple Parallel LM1875 dynamics amplifier.
Oh, I need some help with this one!
It is a triple parallel LM1875 amplifier module.
There's only a few mandatory design criteria, and I can't alter these:
Non-Inverting LM1875 in triple-parallel.
Feedback resistor for each LM1875 is in the range of 100k~127k
NFB cap is employed and is at least 220uF
There are 470uF* power caps at the amplifier board**
Gain is high enough to reach full potential with computer source at 70% of its full output.
An input filter cap is employed.
RF blocking caps are used at +,- chip input pins.
I have to have that head start. Everything else is at your option.
There are ever so many requests for a very loud LM1875 multi-chip design, and no matter why that is, the primary focus is getting it to play with great stability. I need help on that, from those who are wiser than myself.
*470uF is from successful solo LM1875 amplifiers and also suggested in National Semiconductor's AN1192.pdf, but the figure may be adjusted after the amplifier is built and playing. This capacitance is used in addition to a power supply board as indicated in the multi-chip applications datasheet (we're not using gainclone style power circuit here).
**I plan to open-wire (do without a circuit board) because there's only 5 pins to these chips and time spent discussing board layout could be used for listening to music. :) I have lots of parts and the soldering irons are hot. Let's just do it.
For triple parallel non-inverting LM1875. . .
Do I need 1 NFB cap or do I need 3 NFB caps?
If 3 NFB caps, I'm not sure how to precision match all three parts because capacitors do vary per sample. Is there a good way to swamp the component variance?
If 1 NFB cap, do I need a slight ground-lift on the ground side, and then 3 resistors on the "amp side" at one per each chip? I think that this is the right answer but would love to have some experienced comments on the topic.
Do I hardwire the + input of all three chips together (probably not?), or. . .
Does each chip need its own private input load resistor and. . .
Does each chip need a small value resistor series to the + input?
AN1192 page 8 shows you what is required for parallel use of LMs in non-inverting config.
Matching capacitors is like matching any components - buy a few and measure until you find enough that are within whatever tolerance you require of each other.
This will work well and fits your criteria:
Feedback caps don't need to be matched, they are large enough to swamp any variation, but resistors shown as .1% must be matched to keep input currents and feedback gains matched. All other questions are answered in the schematic. And chips are mislabeled, they should be LM1875s.
I had planned to bend up the power pins with pin 3 almost up to the tab, pin 5 up at only 45 degrees. Side view of that is a "V" This is enough space to solder stiff bus rails across (front view) all three chips (one of 16ga for v- and one of 16ga for v+ with a 14ga ground in the middle). With such thick rails and only about 3.5" width, any power effect will be the same for all. So, I had assumed that just one pair of 470uF would be workable. Is that true?
With open wire approach and with a traditional power circuit, I think that we'll have to assume that power star ground is physically located at the large capacitance power supply.
And, that every ground directly at the amplifier chips is a small signal ground. Is that true in this case?
Output resistors on the schematic. . . 150m? Does it mean 0.15R?
Kudos!! The gain setting is just right for the computer source. :)
each amplifier of the triple must be able to operate on it's own. That is the only way you can set up DC output offset.
This requirement demands that each amplifier can operate on it's own, i.e. is complete in itself.
If you look at PA150 you will see three DC Servos. This to allow each amplifier to set it's own DC output offset.
Add RF attenuation.
ref post5 schematic.
I see you have DC coupled the +IN inputs. Do you see that possibly causing a problem?
I have advised against this whenever Members enquire about parallel chipamps going wrong.
Have you made your DC coupled version work?
Can the output offset of each amplifier be set without interacting with the other chipamp input offset currents?
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