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Self-oscillating SMPS problem
Self-oscillating SMPS problem
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Old 29th September 2017, 11:33 PM   #1
de Ocampo is offline de Ocampo  Philippines
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Default Self-oscillating SMPS problem

Hi guys,

I am confused with my diy smps behaviour, you see it is working fine if I use IGBT but if I swap them with the 2sk toshiba devices, the AC mains lamp bulb limiter lits and I don't get any dc reading at the secondary out. Using a 100w bulb load (output traffo disconnected) it oscillates, the test bulb lits.
Can anyone suggest a workaround solution so I can use the toshiba devices? My IGBTs was intended for other DIY projects.

Thanks!

Albert
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File Type: png self-osc_sch.png (64.0 KB, 193 views)
Attached Files
File Type: pdf 2SK2746-Toshiba Semiconductor.pdf (765.6 KB, 27 views)
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Old 30th September 2017, 12:15 AM   #2
de Ocampo is offline de Ocampo  Philippines
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BTW, one more confusing behaviour while using the 2sk devices, the primary v-out when measured in dc acts like a capacitor, it reads some voltage then gradually goes to zero. Inductance leakage?
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Old 30th September 2017, 12:28 AM   #3
nigelwright7557 is offline nigelwright7557  United Kingdom
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1.3 ohms rdson is quite high maybe the SMPS is thinking the current is too high with the mosfet and is turning off ?
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Old 30th September 2017, 12:34 AM   #4
de Ocampo is offline de Ocampo  Philippines
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Quote:
Originally Posted by nigelwright7557 View Post
1.3 ohms rdson is quite high maybe the SMPS is thinking the current is too high with the mosfet and is turning off ?
That could be another part of the problem, but I'm not quite knowledgeable working with smps, I tried changing the value of feedback resistor (1k series with 470pf) possibly to shift working frequency? Nothing positive changes made except making the fets more warmer.
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Old 30th September 2017, 09:13 AM   #5
Elvee is offline Elvee  Belgium
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This sounds like oscillation at a much higher frequency than intended: the MOSfets have a much larger bandwidth than the Igbt's and are probably trying to oscillate (very inefficiently) at RF frequencies.

You could try to slow things down by paralleling a capacitor with the 100t winding of the FB transformer.

Value should be chosen to resonate with the winding's inductance at ~10 times the intended switching frequency. A damping resistor in series might be required to suppress other unwanted behaviors (a few ohms to tens of ohms)
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Old 30th September 2017, 10:29 AM   #6
de Ocampo is offline de Ocampo  Philippines
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Quote:
Originally Posted by Elvee View Post
This sounds like oscillation at a much higher frequency than intended: the MOSfets have a much larger bandwidth than the Igbt's and are probably trying to oscillate (very inefficiently) at RF frequencies.

You could try to slow things down by paralleling a capacitor with the 100t winding of the FB transformer.

Value should be chosen to resonate with the winding's inductance at ~10 times the intended switching frequency. A damping resistor in series might be required to suppress other unwanted behaviors (a few ohms to tens of ohms)
Hi Elvee,

I am thinking of rewinding the gate drive traffo, perhaps lowering the no. of turns will it also work? I saw some design that uses a toroid of about 10-20mm diameter with around 12t of wires for the primary and secondaries (ratio 1:1:1). Just do not know about the material used.
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Old 1st October 2017, 01:25 PM   #7
de Ocampo is offline de Ocampo  Philippines
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Maestro Elvee,

I noticed in comparison with the original schematic from Detex Audio, the schematic at first post does not include these. (attached image). Schematic at first post is a scaled down version using 2 fets, the attached image uses 4 fets. I extracted these datas to compare with the fets devices used.
IRFP460 (used originally)
RDS(on) 0.27r
Input capacitance 4200pf
Output capacitance 870pf
Qg 210
Qgs 29
Qgd 110
(values in nc)

2SK2746
RDS(on) 1.3r
Input capacitance 1500pf
Output capacitance 140pf
Qg 55
Qgs 30
Qgd 25

Will this scheme will work out too in the first schematic?..perhaps doubling the values?
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File Type: png feedback.png (29.0 KB, 140 views)
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Old 1st October 2017, 08:12 PM   #8
Elvee is offline Elvee  Belgium
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Quote:
Originally Posted by de Ocampo View Post

Will this scheme will work out too in the first schematic?..perhaps doubling the values?
Thanks for the title of maestro, but if you look for one, you should search elsewhere. Eva for instance, if she deigns to have a look at your problem.

In the mean time, I think that the snubber is a good idea: try first with the original values and if you notice an improvement, you can tweak it further.
If you use too aggressive values, the dissipation will become unbearable
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Old 1st October 2017, 11:12 PM   #9
de Ocampo is offline de Ocampo  Philippines
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Quote:
Originally Posted by Elvee View Post
Thanks for the title of maestro, but if you look for one, you should search elsewhere. Eva for instance, if she deigns to have a look at your problem.

In the mean time, I think that the snubber is a good idea: try first with the original values and if you notice an improvement, you can tweak it further.
If you use too aggressive values, the dissipation will become unbearable
At the solid state forum you are a Maestro I will do some work on the PCB so I could fit in the snubbers, and find out how it goes.

Sa muli,
Albert
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Old 11th October 2017, 09:12 AM   #10
de Ocampo is offline de Ocampo  Philippines
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While hunting for a suitable gate drive traffo for the 2 fets version..I built Acca's bjt version, tested it in my P3A build (one channel)

Meanwhile I want to see your opinion on this other smps circuit that I googled around. I got interested in the secondary diode config. because it only uses 2x 3pin diode to get a split output supply (+/-100vdc in the schematic). I tested it using a discarded 12-0-12vac traffo, but surprisingly I got a split +/-6vdc reading. Measuring across on both ends of winding I get +12vdc. Is this correct?

Regards,
Albert
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File Type: png 3pin_diodex2.png (15.7 KB, 69 views)
File Type: png split_100vdc_smps.png (45.8 KB, 71 views)
File Type: jpg smps_P3A.jpg (415.4 KB, 46 views)
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