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Old 11th June 2019, 07:08 AM   #71
euro21 is online now euro21  Hungary
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Old 11th June 2019, 07:25 AM   #72
trobbins is offline trobbins  Australia
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Yes, posting the PSUD2 results screen, and the step current box, pretty much allows anyone to clone the same PSUD2 setup and hence provide appropriate comments.

It also helps if the parts have measured values, such as winding resistances for transformers and choke.

It also helps if the reason for the step loading change is described. For example, the rise and stabilisation of B+ after power turn-on may be a voltage stress issue, but not an audio quality issue.
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Old 15th June 2019, 11:17 AM   #73
eduard is offline eduard  Netherlands
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Hello,
Somehow i cannot download the file but these are the values i used for simulation.
T1 400 volt 300 ohm AZ1
L1 30H 350 ohm
C1 40uF 2 ohm
L2 7,5 H 175 ohm ( the 30 H i have with two coils)
C2 80uF 2 ohm
stepped load 80 mA changing into 90 mA after 15 seconds simulate for 2 seconds after reporting delay of 14 seconds and then check V(I1) The rise of C1 looks ok maybe not perfect but after the second LC network it looks more than ok to me. If the second looks nice and the first one is a bit irregular it will be ok? i think the simulation of the stepped load is the most important? If C1 and C2 look perfect but the stepped load looks cripple it will sound bad i guess. I have read that if two RC networks are used in series. the RC product of the one closest to the load must be bigger so the first one will be charged more quickly. When using two LC network in series this will be the same? One must use the DCR of the choke or the inductance of the choke to calculate the two values.

Greetings,
Eduard
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Old 15th June 2019, 11:35 AM   #74
trobbins is offline trobbins  Australia
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Are you able to take a screen grab, or a 'snip' of your PSUD2 window? Or don't you have a way to make the captured image file accessible on the internet?

How do you consider a waveform is 'not perfect' or 'ok' or 'bit irregular' or 'perfect' etc ?

Note that the capacitor connected to the load must bypass effectively all the signal current required by the output stage. PSUD2 just assumes that load current is a constant dc level.
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Old 15th June 2019, 11:55 AM   #75
eduard is offline eduard  Netherlands
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Hello,
I read on a Dutch website that the rise of the voltage should be like a nice line without any bumps...
probably there are no amps that will draw something like a constant current so i thought by simulating a change in current one could see what happens to the voltage.
The simulation i tried for a friend in Czech Republic is similar to mine but mine will have a much higher voltage because it is a DRD amp. Where the say the most important cap is the ultrapath cap. My amp will be used with a 6 cycles 12 DB filter at its input so it might be that the current swings will not be that big?
Greetings, Eduard
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Old 15th June 2019, 07:22 PM   #76
euro21 is online now euro21  Hungary
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I'm not sure that -for me- enormous size of first L is optimal.
At this inductance (large L, large DCR= many turns) the saturation current is mostly mediocre (especially at moderated size of core), so -IMHO- not sure it was suitable in LC.
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Old 15th June 2019, 08:15 PM   #77
eduard is offline eduard  Netherlands
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Hello,
I also have a 30 Henry choke with just 11,2 ohm DCR and i am sure this one will not saturate.
When not using the soft start option you will see that the '' rise '' of the voltage is a bit '' irregular '' Dont know if this will just be at switching on or it will be there during every time the caps will be '' refuelled ''
Greetings, Eduard
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Old 16th June 2019, 12:37 AM   #78
trobbins is offline trobbins  Australia
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Eduard,

I used the same part values in my PSUD2 and get a noticeably lower level of V(C1) and V(C2) at 80mA load, with no charge-up voltage overshoot, and get a larger voltage drop at the current step and with no undershoot of V(C2) (you have used V(I1)).

I get the same response if I use the 5R4GYB diode - is that what you get? However, the datasheets show the 5R4 plate resistance is a little higher, and its voltage capability is a lot higher. The AZ1 also can't support that output current load, so not sure why you chose that?

Did you use the simplified transformer parameter input box (just half-winding voltage and effective resistance), or the more advanced input box (that has inputs for primary and secondary winding voltages and resistances) ?

If the capacitor voltages settle within 1 second (as happens in your power supply), then you can set the current step for say 1.1 sec (there is no need to delay the current step for 15 secs, as steady state conditions have been met prior to the step). Similarly, if the power supply settles within 0.5 to 0.6 secs after power on, then using a 2 sec simulate window (rather than say just 1 sec) just makes it harder to observe the startup waveforms.

The turn-on wiggle character of V(C1) is just related to the initial charging pulses raising that level - it has no influence or relationship to amplifier response of power supply performance, and there is no 'irregular' aspect to it.

Is C2 the output capacitance of the power supply? I note that in one example DRD circuit, there is an 80uF cap from B+ to the cathode of the SE output stage, so just checking if you are not using that particular capacitor as your power supply output bypass capacitor.
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Old 16th June 2019, 08:42 AM   #79
eduard is offline eduard  Netherlands
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Hello,
I used some suggestions found on this website in another thread about PSUD.
An example: I have a preamp with a tube rectifier. I expect it to draw 20mA from the supply. OK, I would model it, set the load as a 20mA current sink, have it step to (say) 24 mA after 15 seconds. This gives the supply a chance to warm up before the current step. I would look at the output for 4 or 5 seconds starting after 14 seconds. Check the box next to V(I1). Ideally, the voltage initially will hit your target, then drop smoothly and exponentially to a lower value after the step. If it rings, you've got some work to do, but it's easier to do in sim than with real parts.

Sorry for being unclear but i was playing with two different simulations. The one with the higher voltage is the one i am going to use for my own DRD amp. On the Dutch website they played around with the dcr of the secondairy windings to show that a higher dcr will give a gradual rise of the voltage. Mine is a big transformer so just played around with a dcr that is much higher. A simple dnm meter will show a dcr from the centre tap to 850V tap around 20 ohm. With the 850 volt simulations i indeed used a 5r4gyb, 5r4gya.

Some people say use the highest H you can get for the input choke, some people say big H with low dcr is easy to cause ringing. Is it best to avoid a peak voltage higher than the average voltage ( that will be there after a second or so) . Will probably use a CSI cap that can take 1200 volt dc. All depends on how perfect i want the rise to be. If the turn-on wiggle will be there just when you turn it on it will have no effect on the sound as you say.

Yes C2 is the output cap of the power supply.
V (C2) and V (I1) are identical when i enter them both in the simulation.
I wanna keep the second capacitor around 80uF which will already have a lot of energy inside when charged with around 670 volts DC.

I always thought than an optimum choke would have zero ohm dcr but sometimes entering a choke with the same H but higher dcr will give better results. I guess that if i take care of the minimum current needed for choke input i could best focus on getting the stepped load graphics in a nice shape. Isnt it so that before the capacitor will be at the minimum value so still going down it will be recharged again??

Greetings, eduard
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Old 16th June 2019, 10:03 AM   #80
trobbins is offline trobbins  Australia
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Eduard,

I would comment that the shape of capacitor voltage waveforms in your LCLCR filter have no tangible performance concern. I would suggest that your concern is based on webpages that have used fanciful evocative language to describe audible performance changes. I would caution about taking any poster's feedback about how good or better an amplifier was made by changing this or that value, or by attaining this or that waveform shape. Some webpages have inherent technical mistakes, and some people embellish damped resonances in to gross poor design that just has to be fixed before an amp will sound its best.

A simulation is good for checking that you are in the right ballpark for voltage and current level, and appreciating whether you could have gross resonance effects.

I would suggest the turn-on waveforms are useful for checking if device limit levels could be exceeded, such as peak capacitor voltage or diode peak current. I'd suggest there is no amplifier audible performance issue relating to that start period. As such, there is no merit in using long delay times or looking at a waveform duration of longer than a second - to do so is suggestive that you are not appreciating what a simulation can and can't show.

A choke is used to reduce the level of AC current reaching the output capacitor and load. If you want to think of an 'optimum' choke then it is effectively the same as a very high resistance being supplied by a very high supply voltage (ie. a constant current source). If you were keen to achieve that performance then you may have to renounce your use of magnetic chokes, and use electronic chokes, as they look like an inductive device for much higher frequencies, or just use a regulated B+ supply.
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