[LTSpice] Beginner - help with capacitor multiplier?

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Background;

My actual purpose is to make an external PSU for the HiFiBerry DAC+ Pro.

Since this point is upstream from a rather good onboard regulator (ADP150), I think it makes sense to have a good, clean PSU, with excellent filtering, but no regulation; the ADP150 can deal with the low frequency ripple. We need 5V, 100mA.

I have very little electronic design or build background.

So (in my first foray into LTSpice) I tried to simulate a basic reservoir/filter cap followed by a capacitor multiplier.

This worked beautifully under AC analysis, dropping 1V of ripple to 10uV at 1KHz, and 1uV by 10KHz, where it stays. Lovely.

But this was with a "npn" in LTSpice. As soon as I try a modelled part from the library, the ripple goes no lower than 2uV.

Can anyone tell me what property of a "real" transistor is causing this?

Clearly, there's a progression from "simulated ideal components" to "simulated real component" to actual build, but I'd like to clear the second hurdle before I try the third.

(circuit attached)

BugBear
 

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A couple of things here. Firstly your ripple of a sine wave superimposed on DC bears no resemblance to real ripple that has a reservoir cap quickly charging and then slowly discharging between each cycle.

We can fix that by simply changing the voltage source to be a pulse of suitable rise and fall times although its now up to us to add the amount of ripple... guesswork.

We could also use a bridge rectifier and an AC source. This is much more accurate. Also, for simple simulations like this try setting the run time to be much longer. Here I have it set to 10 seconds and to start saving data after 9.92 seconds. That lets things settle down, just as they would in a real circuit.

The ripple is now around 5 mv pk/pk which seems reasonable. Have a play with these two versions and look at the settings for the voltage source in the first example.
 

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A couple of things here. Firstly your ripple of a sine wave superimposed on DC bears no resemblance to real ripple that has a reservoir cap quickly charging and then slowly discharging between each cycle.

We can fix that by simply changing the voltage source to be a pulse of suitable rise and fall times although its now up to us to add the amount of ripple... guesswork.

Very neat; thank you.

We could also use a bridge rectifier and an AC source. This is much more accurate. Also, for simple simulations like this try setting the run time to be much longer. Here I have it set to 10 seconds and to start saving data after 9.92 seconds. That lets things settle down, just as they would in a real circuit.

That all seems most reasonable.
The ripple is now around 5 mv pk/pk which seems reasonable. Have a play with these two versions and look at the settings for the voltage source in the first example.

How did you measure that ripple? I can see a nice flattish trace, but can't quantify it.

But, more importantly, on the AC Analysis, my 1V "trash" source doesn't appear to escape the diodes.

Even vRect has AC at 1e-27V !!

In my original model, the AC source called "ripple" serves the dual purpose of representing actual PSU ripple from a bridge rect, but also representing (in a sort of FFT sense) the trash and noise a real transformer/diode system spews out.

BugBear
 
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I measured the ripple on the first revised sim by just probing the output such that you get to see the full value displayed.

I just want to try something on the other one.
 

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The default NPN has the parameter Vaf=∞, which in practice means no Early effect.
Since it is the dominant source of imperfection in a cap mult application, this only leaves very minor degradations, hence the good (but impossible) performance

I understand very little of that, but I'm sure google will help me.

Thank you.

EDIT; https://en.wikipedia.org/wiki/Early_effect

That's way above my pay grade. :eek:

BugBear
 
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I just want to try something on the other one.

Didn't work :(

This does though :) You could rig up the AC voltage source + bridge to determine the 'true ripple' of your circuit and then feed those values into the simulated ripple source. That seems to overcome the problem of the simulation constantly settling to a final value. Even running for 100 secs still leaves the output voltage with a definite falling value making it hard to estimate the ripple.

Also try this.

Now I can't do a screen shot but here is what you do.

1/ Run the sim and probe the incoming ripple and the final ripple. As you mentioned, the final ripple is just a straight line, no resolution is possible.

2/ Place your cursor over the straight final ripple somewhere over at the left hand side and holding a left click drag a box over the whole trace.

3/ Keep doing that and you will go from this to this.
 

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Following a look at other capacitor multiplier circuits, I tried to add a protection diode across the transistor (baby steps, I know).

I can add a generic diode, but I can't find a 1n4001 in right-click, edit dialogue "Pick New Diode"

As I understand it, this is a stupidly common diode, so what am I doing wrong?

BugBear
 
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Your not doing anything wrong. There are countless more parts in everyday use than the standard library could ever contain. The MURS120 is fairly a good general purpose one to use in simulations I find. Even the IN4148 is OK, why... because they don't burn out in simulation ;)
 

PRR

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SPICE is an idiot.

YOU have to think.

"Capacitance multiplier". So you have like 47u at the Base, say hFE is 100, it multiplies up as like 4,700u.

But you ALREADY have a 4,700u cap at the input?

This is a lot of complexity for not-much improvement.

I would up-size the 47u caps rather seriously. Take the money out of the budget for the 4700u cap.

(Do you know how to size a first-filter cap without SPICE or even a slide-rule?)

The R-C products 150R+47u seem lame to me. If I wuz coupling a 150 Ohm load to an amplifier I would use at-least 67uFd. If I was over-filtering DC I would tend to round-up severely from there. Or alternatively examine the 150r (actually 300r) to see if it could be lower. OK, we got 300r/100 or around 3 Ohms, feeding a 50 Ohm(?) load, we got some sag and may not want more.

One place that SPICE can bite you in the tush-- that ".AC" analysis is SMALL SIGNAL (at least in older SPICEs). It first ignore the AC source and finds the DC operating points. Then it applies infinitely small AC. This will not tell you about clipping. In many cases, the pre-bias finds zero current in the transistors, so they act dead.

At least in my SPICE I feel I must use ".TRANS" analysis. This plots point-by-point over time. Yes, some other graphs posted here appear to do this correctly, so newer SPICEs may have combined the modes.

I simplified your plan to save my fingers. Half-wave 100Hz is probably worse (but saves drawing a FWB). I took a buck away from the big cap and put it in the little caps. I'm seeing 0.3mVpp ripple. I do not believe I could get that in a real build due to parasitics everywhere.

When I had a hot iron and a box of parts, I cudda built and measured it faster than entering it into the phantom zone of SPICE. ~~30 minutes to find and tack parts versus 44 minutes to SPICE it.
 

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Thanks for that; I have been doing both AC and trans simulations on my designs.

I am not too worried about mains freq ripple, since the purpose of this circuit is not to feed a class A amplifier, but an ADP150 regulator. It works very well down at mains freq, and will regulate away the ripple.

I am much more concerned about high frequency trash from the transformer and rectifier diodes (which is beyond the frequency range of the regulator), so I wanted very good filtering at high frequency.

This is why I have a second order filter in the capacitance multiplier (which is really a filter-power-multiplier).

Since the capacitors in the multiplier only perform low power frequency filtering I left them small, moving the frequency down with resistors in the R/C.

The capacitor after the diodes is large, since it's a "true" capacitor, serving not only as a frequency filter, but as a reservoir.

I actually have another circuit which is a simple CRCRC. This does (of course) a very good job of removing high freq trash, but needs much larger caps. My purpose in this thread was to understand simulation; I will defer discussion of my audio project to another time.

As you imply, I have much to learn.

BugBear
 

PRR

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> much more concerned about high frequency trash

I was mildly surprised at the "sharp" zigs in the output wave. Obviously 2-pole filtering does not get all the crap.

For 50/60Hz and low harmonics, we need BIG caps/chokes. If you are worried about crap 1KHz and up, smaller and more practical chokes and caps can do good work.

All small crap estimates will be foiled by stray parasitics in the real amp. Rectifier spikes induce large voltages even in short fat wires. All caps have R and L. All chokes have R and C.

It can be tedious to add all these parasitics to SPICE. (Even just the ones you know.)

Multi-stage filtering *may* work better. For 50/60Hz it is folly to design for more than 30dB-40dB in one stage, because the parasitics are at the 1% (-40dB) level. Three stages of 20dB/stage *can* approach 60dB filtering.
 
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