Hello! I have been building an offline Half-Bridge SMPS of about 400W with a friend of mine. We need a voltage of around 40-45V at the output that will be used with a buck converter later.
At the output of the SMPS we have a current source with a BJT transistor which guarantees about 100mA of load.
The SMPS is working at 100KHz, we drive the MOSFETs through 1:1 driver toroids and we get around 12V at MOSFET gates (we are using IRF840). The duty is fixed at 50% with a 625ns dead-time. Everything is controlled through a PIC microcontroller and an IR2110 which is used as dual low-side driver to drive the toroids which control the MOSFETs' gate. The input voltage is 220V RMS.
With a 1A load we get around 48V at the output of the SMPS but as we start adding more load, the voltage drops drastically, at 10A the voltage drops to 32V with the duty at 50% so we can't go higher. However we noticed that the output voltage is dropping after the DC Choke. If we measure the RMS voltage before the DC Choke it moves from 48V to 45V but on the other side we have a huge voltage drop.
We used the "Power Supply Cookbook by Marty Brown" book to design the SMPS.
In the attachments you can download a PDF with the complete schematic and the PCB, the only change is the 1k load resistor at the output that was replaced by the BJT and the snubber network on the primary side that is not implemented yet. The transformer is an EE42, it has 33 turns on the primary side and 12 turns on each side of the secondary, everything using Litz wire made of 0.3mm copper wires. L2 is a 20mm ferrite toroid with 70 turns.
Any suggestions?
Thank you very much for your help!
At the output of the SMPS we have a current source with a BJT transistor which guarantees about 100mA of load.
The SMPS is working at 100KHz, we drive the MOSFETs through 1:1 driver toroids and we get around 12V at MOSFET gates (we are using IRF840). The duty is fixed at 50% with a 625ns dead-time. Everything is controlled through a PIC microcontroller and an IR2110 which is used as dual low-side driver to drive the toroids which control the MOSFETs' gate. The input voltage is 220V RMS.
With a 1A load we get around 48V at the output of the SMPS but as we start adding more load, the voltage drops drastically, at 10A the voltage drops to 32V with the duty at 50% so we can't go higher. However we noticed that the output voltage is dropping after the DC Choke. If we measure the RMS voltage before the DC Choke it moves from 48V to 45V but on the other side we have a huge voltage drop.
We used the "Power Supply Cookbook by Marty Brown" book to design the SMPS.
In the attachments you can download a PDF with the complete schematic and the PCB, the only change is the 1k load resistor at the output that was replaced by the BJT and the snubber network on the primary side that is not implemented yet. The transformer is an EE42, it has 33 turns on the primary side and 12 turns on each side of the secondary, everything using Litz wire made of 0.3mm copper wires. L2 is a 20mm ferrite toroid with 70 turns.
Any suggestions?
Thank you very much for your help!
No, how can I measure the leakage inductance? I'm measuring the Vrms using a digital oscilloscope.
What size do you suggest? Should it be ferrite or iron powder?
Leakage inductance is measure by measure primary inductance when shorting secondaries. when the current goes up, the leakage current degrades regulation, ie the output voltage. Based on your interleaving the windings I dont think this is the caues for the entire voltage drop, only part of the 48-45 V.
Can you post some wave form pics of the secondary, it would help a lot.
I suspect saturation of the ferrite, so using Iron powder cores have att higher Bsat, but you need to size it properly. This means putting the poles and zeros correctly with the capacitors and their ESR.
As I have no data on the ferrite I guess it eithers saturates, or the inductance is to high , as 70 turns on a ordinary ferrite will give inductance in the mH, it will degrade regulation enormously , ie the voltage drop will be massive just by pulling a low current through it.
Can you post some wave form pics of the secondary, it would help a lot.
I suspect saturation of the ferrite, so using Iron powder cores have att higher Bsat, but you need to size it properly. This means putting the poles and zeros correctly with the capacitors and their ESR.
As I have no data on the ferrite I guess it eithers saturates, or the inductance is to high , as 70 turns on a ordinary ferrite will give inductance in the mH, it will degrade regulation enormously , ie the voltage drop will be massive just by pulling a low current through it.
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There is none, this is a free running without feedback, ie no compensation for internal impendances causing regulation.
It is just like an ordinary 50Hz+diode bridge + caps power supply, but at higher frequency... any 50 Hz ripple at the input will of course manifest itself as 50Hz (or rather 100Hz) ripple at the outlet.
I interpret the data so that moving from 1-10A load the Vrms voltage before the choke is dropping from 48-45 Volts, but drops more than that after the choke.
It is just like an ordinary 50Hz+diode bridge + caps power supply, but at higher frequency... any 50 Hz ripple at the input will of course manifest itself as 50Hz (or rather 100Hz) ripple at the outlet.
I interpret the data so that moving from 1-10A load the Vrms voltage before the choke is dropping from 48-45 Volts, but drops more than that after the choke.
This type of SMPS behaves the same as an old-fashioned choke input power supply. If the load current is too low to magnetize the filter choke, it operates in discontinuous current mode, and the DC output voltage is equal to the peak input voltage to the rectifier. As you transition into continuous current mode, the output voltage falls from the peak to the average.
If by 50% you mean that both transistors are off 50% of the time, this would explain the problem, as the average of this waveform once rectified is half of the peak.
If you mean that the high side is on 50% of the time and the low side the other 50% (what I would call 100% duty in a situation like this, as both sides contribute to the output) then we need a different explanation, as the average and peak are the same. It could be excessive leakage inductance in the transformer, or excessive resistance in the filter choke.
Speaking of which, a ferrite toroid is completely the wrong thing for L2. You need a large iron powder or MPP toroid, or a ferrite E core with an airgap. And 70 turns on a 20mm core implies pretty thin wire with lots of resistance. Ohm's law applies here too, the resistance of the filter choke will cause droop in the DC output voltage.
If by 50% you mean that both transistors are off 50% of the time, this would explain the problem, as the average of this waveform once rectified is half of the peak.
If you mean that the high side is on 50% of the time and the low side the other 50% (what I would call 100% duty in a situation like this, as both sides contribute to the output) then we need a different explanation, as the average and peak are the same. It could be excessive leakage inductance in the transformer, or excessive resistance in the filter choke.
Speaking of which, a ferrite toroid is completely the wrong thing for L2. You need a large iron powder or MPP toroid, or a ferrite E core with an airgap. And 70 turns on a 20mm core implies pretty thin wire with lots of resistance. Ohm's law applies here too, the resistance of the filter choke will cause droop in the DC output voltage.
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Output at 1A load:
https://www.dropbox.com/s/3c6mmby1nhziz85/2014-11-17 08.20.53.jpg
Output at 9.5A load:
https://www.dropbox.com/s/xgi7cy74ezk4d1o/2014-11-17 08.21.07.jpg
Before Choke and after rectifier at 1A load
https://www.dropbox.com/s/93eukyd9l16bvcn/2014-11-17 08.24.41.jpg
Before Choke and after rectifier at 9.5A load
https://www.dropbox.com/s/4y070lmue3d0ppy/2014-11-17 08.22.27.jpg
We have used the output Choke of a PC Power Supply and I get around 1.5V higher at the output. The formula from the book gives us 1.8mH for the output choke.
The duty is fixed at 50% and it's open loop now. Duty can't go higher than 50%.
Yes, both transistors are 50% off and 50% on. So you say this is the expected behaviour? We calculated the transformer for a 45V output voltage. We have used the output Choke of a PC Power Supply and I get around 1.5V higher than using our ferrite core.
According to the book the toroid should be about 20mm. I will get an Iron Powder core and try again!
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Ok, we tested again with an iron powder 20mm toroid (the biggest we could find) and the result were the same. We measured the 300V line after the main rectifier to see if we got any ripple and this is the result:
So we decided to power the SMPS with the 12V line from a PC power supply to see if it was the reason for the high ripple we were getting on the output. This is the measurements we got, the yellow signal is measured from one point of the secondary to ground (mid point) and the blue line is the output of the SMPS:
So the ripple at the output is not because of the 50Hz ripple from the line as you can see. Then we added a snubber network on the secondary to reduce the oscillations with the hope of reducing ripple at output. We used a 4.7Ohm resistor with 2 capacitor values. The first image is for a 10000pF capacitor and the second one for a 47000pF capacitor. The snubber network is connected from one point of the primary to ground (mid point):
No matter how much we attenuate the oscillation the ripple at the output is still there. I'm telling you this because maybe if we eliminate the output ripple, the voltage drop when the output is loaded may be lower.
So we decided to power the SMPS with the 12V line from a PC power supply to see if it was the reason for the high ripple we were getting on the output. This is the measurements we got, the yellow signal is measured from one point of the secondary to ground (mid point) and the blue line is the output of the SMPS:
So the ripple at the output is not because of the 50Hz ripple from the line as you can see. Then we added a snubber network on the secondary to reduce the oscillations with the hope of reducing ripple at output. We used a 4.7Ohm resistor with 2 capacitor values. The first image is for a 10000pF capacitor and the second one for a 47000pF capacitor. The snubber network is connected from one point of the primary to ground (mid point):
No matter how much we attenuate the oscillation the ripple at the output is still there. I'm telling you this because maybe if we eliminate the output ripple, the voltage drop when the output is loaded may be lower.
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All your waveforms, incuding everything before and after your output inductor, looks pretty OK to me.
You might want to try a L-C-L-C filter at the output, though.
You might also want to measure the power consumption on the primary side, so that we have a clue of your SMPS efficiency.
I do believe your SMPS flat out power is the 300W you are measuring right now and thats it.
To get more power out, put more copper on your transformer. Reduce frequency. If the core can take it...
You might want to try a L-C-L-C filter at the output, though.
You might also want to measure the power consumption on the primary side, so that we have a clue of your SMPS efficiency.
I do believe your SMPS flat out power is the 300W you are measuring right now and thats it.
To get more power out, put more copper on your transformer. Reduce frequency. If the core can take it...
Speaking of more copper... What wire gauge have you used on your transformer secondary and filter choke? What is the total wire length? Estimated resistance?
How is the transformer wound? The primary and secondary need to be as close as possible if leakage inductance isn't to limit output. The textbook transformer with primary on one core limb and secondary on the other is mostly useless at SMPS frequencies.
How is the transformer wound? The primary and secondary need to be as close as possible if leakage inductance isn't to limit output. The textbook transformer with primary on one core limb and secondary on the other is mostly useless at SMPS frequencies.
With a 2A load and 48V at output I got 450mA at 220V RMS on the input. What do you mean by more copper? More turns? Reducing frequency doesn't reduce output power? How do I calculate the LCLC filter? My book doesn't have any calculation for it :/
The primary is 33 turns made of 3 wires of 0.3mm of diameter forming a litz wire. The secondary is 12 turns made of 12 wires of 0.3mm forming a litz wire.
First we wound all the primary, then we added some kind of paper we bought that is used in transformers to isolate primary and secondary. After that we wound the first half of the secondary with 12 turns, added isolator again and then the other 12 turns. Finally we added a not closing piece of copper surrounding all the windings and connected it to the output GND. Everything is wounded in the same direction.
The output choke we tried different wires with different cores, we tried 0.8mm copper wire, 3 wires of 0.3mm as litz wire and 1.2mm copper wire.
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We used this site to get the wire diameters according to current. The 0.8mm copper wire has about 33 ohms per kilometer and we used about 2.5m of wire so that gives us 0.08 ohms which at 10A results in a voltage drop of 0.8V.
I will try to get an inductometer and measure leakage inductance. How much leakage is good? Should we rewind the transformer winding half primary, then secondary and then the other half primary?
If the filter choke DCR is satisfactory, that leaves transformer leakage inductance as the final culprit.
Personally I would have wound the secondary bifilar (two wires side by side) so the two halves run alongside each other for maximum coupling. Leakage inductance between the secondary halves will mess this circuit up too.
I would wind half of the bifilar secondary, then the primary, then the other half secondary.
Personally I would have wound the secondary bifilar (two wires side by side) so the two halves run alongside each other for maximum coupling. Leakage inductance between the secondary halves will mess this circuit up too.
I would wind half of the bifilar secondary, then the primary, then the other half secondary.
If the leakage inductance is indeed the culprit, a possible workaround is to make the converter partially resonant by tuning C22 to the leakage inductance.
Due to the high reactive power, it will have to be a PP type (in fact, it should already have been, considering the current it has to withstand)
Due to the high reactive power, it will have to be a PP type (in fact, it should already have been, considering the current it has to withstand)
Great, will measure the leakage inductance today. What is considered a normal value?
We tried changing the output choke and used a solenoid instead of a toroid and the output ripple drop to the half (still high). Any advice how to design the LCLC filter?
Elve sorry for my ignorance but what is a PP type?
We tried changing the output choke and used a solenoid instead of a toroid and the output ripple drop to the half (still high). Any advice how to design the LCLC filter?
Elve sorry for my ignorance but what is a PP type?
No straight answer as to what is a "normal" value of leakage inductance. Leakage inductance directly affects output voltage regulation due to overlap. If you want a stiff output voltage with no active regulation, you may need very small leakage inductance, like less than 0.1uH. Time to bust out the textbook 
http://www.ehu.es/electronica-industrial/ElectronicaIndustrial_Automatica/apuntes/overlap1.pdf
http://www.ehu.es/electronica-industrial/ElectronicaIndustrial_Automatica/apuntes/overlap1.pdf
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