CheapoModo: quick and dirty transformer snubber bellringer jig

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A high quality test-jig called Quasimodo has been described on diyAudio; it helps you find the optimum value of transformer snubber components without using mathematics.

As presented in that thread, Quasimodo is a no-compromise design using a state of the art vertical MOSFET with Rds(on) < 0.01 ohms, and an insanely powerful gate-driver IC with 6.0 ampere output current. It works best on a 2 layer PCB with a groundplane and careful layout.

But some people might want to slap together a snubber test-jig on their solderless breadboard ("proto board") and not worry about amps of current and milliohms of resistance. Nor do they wish to purchase "exotic" components and pay exorbitant fees for shipping. A snubber jig made of junk-box parts is more to their liking. And so I present CheapoModo, a Quasimodo whose parts and construction are cheap and cheerful.

Instead of a rail-to-rail CMOS oscillator/timer chip, CheapoModo uses the classic old graybeard NE555 chip, perhaps the highest volume IC in the world. Instead of a special Gate Driver IC, Cheapo-Modo uses a pedestrian 3904/3906 junkbox transistor pair. Instead of an exotic output MOSFET, Cheapo-Modo just plunks down 3 dirt cheap junkbox MOSFETs and accepts whatever performance degradation they introduce. The schematic is below. An LTSPICE-ready ".asc" file is also attached (inside a .zip file), making simulation rather simple.

Fool around with it. Change the component values. Put in different MOSFETs. Try some Zetex TO-92 parts. Try some IRF (or NXP!) TO-220 parts. Try different power supply voltages. Does it work at 5 volts? Does it work at 18 volts? Try it and see. What is the power consumption? How quickly will it discharge a battery power pack?

Play with different transformer secondary leakage inductances (Ltrafo). Play with different snubber resistor and capacitor values. It's only simulation, it can't hurt you, it can't hurt your computer. Play with it.

Then: change it! Optimize CheapoModo according to your definition of "optimum". Add or subtract features. Introduce or remove operating modes. Change the speed / power / cost / board_area however you wish.

Edit 1: I still have a few extra PCBs + kits of all parts that I'm selling off at my cost, in the Vendors' Bazaar: link

Edit 2: Post #132 contains the most recent ("V3") Cheapomodo schematic and the most recent PCB CAD files that you can send to a PCB fab.

Edit 3: Post #187 of this thread presents a Veroboard / Stripboard layout of Cheapomodo. It's one way to successfully build a Cheapomodo without buying or etching a printed circuit board.
 

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Perhaps the most intuitive way to grasp the similarity of the two circuits, is to work with them visually. Draw both schematics on a single sheet of paper, then encircle matching subcircuits.

To make this easy, I've attached an image file which contains both schematics, re-sized so they're approximately the same width. Open this file with Paint or another graphics editor, and make a red rectangle around the Turbo-Encabulator on each schematic. Draw green ovals around the Frammis on each schematic, and put blue rectangles around the Gaerna-Fjorms. Continue annotating like blocks with like colors.

Not wanting to ruin anybody's fun, I've put my own "solution" (with which you might disagree!) into a .zip file, so that it won't pop up as a thumbnail image and interfere with your own original thinking.

MJ
 

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Why not hit it with a pulse, not a square wave?
RJM1, I think it is not a good idea to eliminate the MOSFET output driver. Its very low Rds(on) clamps the output node to ground very tightly, preventing the active circuit from contributing any excess damping to transformer + snubber resonant circuit. See references 6 & 7 in the Quasimodo design note for more of the theory.

You can watch the post#5 circuit misbehave when resistor Rs is set to 10K, to simulate the situation where the trimmer potentiometer is removed from its socket {the first step of optimizing a CRC snubber with CheapoModo}. Plot the voltage at the collector of Q1: it whangs around in uncontrolled flailing, more than 1000 millivolts away from ground. A BJT output stage is a poor imitation of a low-valued resistor. By contrast, CheapoModo, with its three parallel dirt-cheap (and terrible spec) MOSFETs, clamps this node within 20 millivolts of ground. And Quasimodo, using an optimized low-Rds device, clamps it within 200 microvolts.

I don't think it matters very much whether you DC-couple the output stage to the oscillator (as in CheapoModo), or you AC-couple the output stage to the oscillator (as in your post#5 circuit). Just remember to set the timeconstant of the coupling capacitor(s) long enough, so the output stage doesn't reset itself prematurely. Your circuit appears to reset itself in 0.01 milliseconds (the R4-C5 timeconstant). Unfortunately this is not nearly long enough; reset needs to be delayed at least 1 millisecond after the falling edge, so you can observe phenomena like Figure 12 of the design note, reproduced below. You'll also need to adjust the NE555's duty cycle so that both the output-high and output-low segments of the oscillator waveform, are at least 1 millisecond wide.
 

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Here are three other cheapo gate driver circuits

Post#1 of this thread has a gate driver subcircuit consisting of of 2 junkbox BJTs and 4 resistors. Here are three alternatives that use fewer parts and may have better performance. Simulation will disclose the strengths and weaknesses of each.

ckt#1 is (the empty set); there is no gate driver at all. The NE555 output is directly connected to 3 parallel MOSFETs' gate terminals.

ckt#2 uses a common-emitter PNP to make a damn-fast rising edge at node GATE. A resistor pulldown avoids "crowbar" current but gives leisurely falling edges. Fortunately we don't care.

ckt#3 replaces the PNP in ckt#2 with a discrete Pchannel MOSFET, saving a resistor.

Ckts 2 and 3 include a pullup resistor on the 555's output, to compensate for the fact that the NE555's output stage is a Darlington emitter follower; it doesn't pull its output pin all the way to VCC. And oh, by the way, the 555 simulation macromodel in LTSPICE doesn't model this correctly. The macromodel's output incorrectly swings rail to rail. D'oh!

Have some fun with these.
 

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I can get down to 0.7us rise time (on the fast edge) and 1.6us fall time using the 3904/3906
But the very limited currents available from the complementary pair is slowing down the edges.

Omitting the 3904/6 and driving the irf510 from the 555 gets to ~1us for both rise and fall times.

I changed the timing cap from 100nF to 10nF and then to 1nF to allow my analogue scope to see and measure the fast edges.

How fast should this circuit be able to go?
How fast does it need to go?
 
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If anyone prefers gate driver subckt#1 ("the empty set"), but is concerned that Linear Technology doesn't make and sell NE555 chips, so LT are not motivated to make a super-accurate simulation macromodel of the 555, I think you're right to be nervous/skeptical. We've already seen that the LT macromodel swings rail-to-rail but the real NE555 decidedly does not.

Fortunately you can build a simulation of the real 555's internal guts, driving the CheapoModo output stage. Then you can compare results against the LT simulation macromodel of the 555, driving the same CheapoModo output stage. And you can judge for yourself, whether you are satisfied or dissatisfied with the degree of similarity. Your simulation results might resemble the pictures below.
 

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How fast should this circuit be able to go?
How fast does it need to go?

We've seen physical measurements of transformers whose optimum (Cx, Cs, Rs) snubber was (0.01u, 0.15u, 183R) ... page 10 of the Quasimodo design note. Call that "Case 1".

We've also seen physical measurements of transformers whose optimum (Cx, Cs, Rs) snubber was (0.01u, 0.15u, 4.0R) ... (post #233 in the Quasimodo thread). Call that "Case 2".

We've also learned that Quasimodo+CRC snubber is, at heart, merely a machine that measures inductance (QM post #257). So you could back-calculate the secondary leakage inductances of Case #1 and Case #2, and then set yourself a design goal such as this one:

  • My CheapoModo will work flawlessly in simulation, and give the correct answer, when I drive a Case#1 leakage inductance, AND also when I drive a Case#2 leakage inductance.
 
That's why Quasimodo V4 (thru hole) PCBs have a dip switch. To brighten the traces on analog scopes.
Not what I meant.

With the standard spike repetion rate of around 100Hz, the analogue scope sees an almost zero rise time and almost zero fall time.
I can use the 10times horizontal expansion switch and still it looks like near zero rise and fall times.

If I change the repetition rate to around 1400Hz using a 10nF timing cap and then use the 10times expansion of the horizontal I can discriminate an actual rise time and fall time, but it is still too short to measure.

Now changing the repetition rate to 14kHz and with 10times expansion I can see and read the rise and fall times.

Now that I have the ~ 1us rise and fall times on the spikes with the very slow decay I have rest the timing capacitor to 150nF for ~ 100Hz repetition of the spikes.

I asked:
Is this fast enough?
Or does it need to be faster?
 
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Post #51 in the original Quasimodo thread makes one suggestion; post #12 in this thread suggests a different simulation-based approach to obtaining insight and an answer.

Page 12 of the Quasimodo design note tells how to use a dual trace oscilloscope to trigger upon the important event, allowing you to dial up a very fast horizontal sweep rate and view the exact waveform segment you desire.

However if your scope's sweep rate is 20 nanosec/cm and your Quasimodo oscillator's period is 8.3 milliseconds (120 Hz), then your scope's electron beam paints the CRT for 200 nanosec (20ns/cm x 10cm) every 8.3 millisec; a duty cycle of 0.0024 percent. So it will be a VERY dim trace, best viewed in a darkened room. Quasimodo V4 PCB offers frequency boost of 5X and/or 25X, via dip switches, making the trace 5X less dim or 25X less dim. Digital scopes like my £190 Rigol DS1102, don't have this problem of course. They have other problems instead.
 
I've just gone ahead and build the thing. Used BC547/557 instead of the 2n3904/06 and the BS170 instead of the 2n7002. Specs of the components are roughly the same.

And it works like a charm! Very easy to dial in the optimum resistor value. So thanks for opting the idea to build one with junkbin parts. It has been a while since I used vero board :D. I've added some headers to quickly swap the caps and pot, so I can experiment with different values, dielectrics, voltages, etc. Now for a nice box...

P.S. Thanks Mark for the education in snubbing the transformer ringing in the original Quasimodo thread. I've learned A LOT.

without.jpg With.jpg foto (2).jpg
 
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Funk1980, congratulations! Your before-and-after waveforms are textbook perfect.

I'm glad that you used different part-numbers for the PNP, NPN, and Nch MOSFET. CheapoModo is not sensitive to part types*, just about anything from the junkbin will work -- which your successful board proves, quite convincingly.

* But of course you still have to get the pinouts correct! For those who may not know, BC547 and 2N3904 have different pinouts. Let the builder beware.
 
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I've just gone ahead and build the thing. Used BC547/557 instead of the 2n3904/06 and the BS170 instead of the 2n7002. Specs of the components are roughly the same.

And it works like a charm! Very easy to dial in the optimum resistor value. So thanks for opting the idea to build one with junkbin parts. It has been a while since I used vero board :D. I've added some headers to quickly swap the caps and pot, so I can experiment with different values, dielectrics, voltages, etc. Now for a nice box...

P.S. Thanks Mark for the education in snubbing the transformer ringing in the original Quasimodo thread. I've learned A LOT.

View attachment 403327 View attachment 403328 View attachment 403329

Nice build! I think that everyone would benefit if you are able to supply a layout for that, too. :rolleyes:
 
Nice build! I think that everyone would benefit if you are able to supply a layout for that, too. :rolleyes:
Thanks guys!

Well, to be honest, I've quite literally followed the LTSpice schematic for layout of the components, including the Vcc and GND rail. I'm more than willing to make a picture of the solder-side, but I doubt it'll help much, since it's a veroboard. Let me know.

One question regarding transformers with multiple secondary windings (toroidal with 250V for audio and 12.6V for heater in my case). Should every winding have it's own network, or does it suffice to only snub the winding used for the actual audio path?
 
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I don't see any need to snub transformer windings that supply pure AC to non-rectifier loads { such as valve heaters }. No diode, means nobody to ring the bell, means no ringing.

For transformer windings that drive rectifier diodes, I recommend following the left hand column of Figure 13 (p.11) of the QM design note.
 
I don't see any need to snub transformer windings that supply pure AC to non-rectifier loads { such as valve heaters }. No diode, means nobody to ring the bell, means no ringing.

For transformer windings that drive rectifier diodes, I recommend following the left hand column of Figure 13 (p.11) of the QM design note.

Yes I should've been more descriptive. It's for the winding providing the voltage for a DC heater (rectifier -> cap -> LM317). I'll use the given testing method and provide independant snubbing.

Update: The heater winding came out on 9.3 ohm. So 10 ohm will do nicely.