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Thread Tools |
17th January 2021, 09:05 AM
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#21 |
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diyAudio Member
Join Date: Oct 2016
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The reason an ASRC is used for jittter reduction of SPDIF is basically because some ASRC chips have a good PLL which generated a new better clock than the clock from the DIR.
If I will create a mainboard the SPDIF part will not be part of it, both options are possible, maybe even selectable (if I would ever add SPDIF, because at this moment I have no SPDIF source of interest) |
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