Music Main board for diyer

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My system now uses a sound card but the clock on it is replaced with the flea (????????: ? Shigaclone ??? Clock ??) + tentlab XO (http://www.tentlabs.com/Components/XO/index.html) combo.
I wish to do the same on your board. Therefore, please allow the user to change the clock easily and use their own clock regulator.

I reserve two kind XO size. TCXO pine spec is 15.24X7.9 mm, Another OCXO 5 pin spec is 19.05 X 19.05 mm. If you have any other suggestion XO brand, Please let me know. XO power supply is excluded, so have to use their own power regulator.
 
The spec of tentlab is good and it does sound good! The phase noise is low.

Further, can you exclude using switching power on the board, which adversely affect the sound quality. I am not expert but is it possible that only linear voltage regulator is used?

Regards
Excluding SW regulator is what I want to do ,too. For chip stage power supply, There are more than 10 rails need be regulated by PMIC on broad and need manage on/off sequence. There are few SW regulator inside PMIC for control purpose what liean regulator can not do. It is possible using more than 10 linear regulators replace the one power managment IC but that may cause stable problem, so I give up doing that finally. I think the power supply structure of this broard is the fewest in using SW regulator. And the source of sw regulator is leaner power.
 
Do you know about the undocumented 176.4kHz->88.2kHz bug in SPDIF output of Envy24HT? I think that is the main reason ESI Juli@ and Infrasonic Quartet use additional Xilinx for clock generation and switch the Envy chip to external clock.

IC vendor revise the reply to new one "That is not bug. That is H/W limitation". I think thate is reasonble causing the oreginal IEC958 Bandwidth occupation : 100kHz up to 6Mhz and Signal bitrate is 2.8Mhz (Fs=44.1kHz), 2Mhz (Fs=32kHz) and 3.1Mhz (Fs=48kHz). so the SPDIF transmiter inside ENVY24HT can not output more 96Khz, I plan use 192 SPDIF transmitter CS8406 on I2S output replace intergrated ICE 958.
 
I ask the question to the VIA pepole formally. Their reply is "There is no problem for that". I have not enough information deal with this issue now. I will pass it for now. If you have more detail infromation please let me know. Thanks.

I asked for re-checking using original windows drivers one guy who designs and sells custom FPGA boards for audio Audiopraise :: Specialist in digital electronics and signal processing . He confirmed the SPDIF output of his Chaintech AV710 for 176.4kHz corresponds to 88.2kHz frequency, while I2S lines are correct for all samplerates. Exactly corresponding to my observations with linux driver, designed to comply with the Envy24 datasheet available on internet.
 
I asked for re-checking using original windows drivers one guy who designs and sells custom FPGA boards for audio Audiopraise :: Specialist in digital electronics and signal processing . He confirmed the SPDIF output of his Chaintech AV710 for 176.4kHz corresponds to 88.2kHz frequency, while I2S lines are correct for all samplerates. Exactly corresponding to my observations with linux driver, designed to comply with the Envy24 datasheet available on internet.

Thanks for your information. What do you think for using CS8406 on concurrent stereo pair I2S output to reach 192 and 176.4kHz ?
 
Thanks for your information. What do you think for using CS8406 on concurrent stereo pair I2S output to reach 192 and 176.4kHz ?

There are some options CS8406, DIT4192(Texas), SPDIF-T(Xilinx) for 192kHz SPDIF transmitter, I guess most of sound card use SPDIF-T program core of Xilinx for easily software control. Have Any one comment upon CS8406, DIT4192(Texas), I think transmitter is quite important for sound character.
 
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