Having characterized the Tokin SIT for Vgs and transconductance at 24V at 1.5A Ids, I went through my stash of P-channel FETs for a possible match for a DEFiSIT follower.
Parts that I tested are 2SJ162, 2SJ618, IRFP9240. They were all very far away from the Vgs of the Tokin SIT. Interestingly, The 2SJ162 LATFET and the Tokin SIT both have a negative tempco so the Ids falls with temp for the DEFiSIT pair.
I was just about to power down the instruments when I remembered the hockey pucks bought for the F4 beast. Connected the P-channel hockey puck to the curve tracer and BAM! The Vgs of this part is within about 100mV of the Tokin SIT at 24V Vds at 1.5A Ids. The P-Channel puck has a higher Vgs than the Tokin SIT so the pair will have less current than planned.
Quickly lashed up the Tokin SIT to the IXYS hocky puck and POW! Nice steady Ids ~ 710mA after a short warm-up. Increasing voltage rails increases Ids. If you must have 1.5A Ids, just increase the rail voltages.
The IXYS hockey puck that I had on hand and used is the IXTN210P10T. This part at -30V at -2A bias is about 10% of DC SOA and less than 10% of rated max power dissipation.
Looking forward to trying this further when my Tokin SITs show up.
Parts that I tested are 2SJ162, 2SJ618, IRFP9240. They were all very far away from the Vgs of the Tokin SIT. Interestingly, The 2SJ162 LATFET and the Tokin SIT both have a negative tempco so the Ids falls with temp for the DEFiSIT pair.
I was just about to power down the instruments when I remembered the hockey pucks bought for the F4 beast. Connected the P-channel hockey puck to the curve tracer and BAM! The Vgs of this part is within about 100mV of the Tokin SIT at 24V Vds at 1.5A Ids. The P-Channel puck has a higher Vgs than the Tokin SIT so the pair will have less current than planned.
Quickly lashed up the Tokin SIT to the IXYS hocky puck and POW! Nice steady Ids ~ 710mA after a short warm-up. Increasing voltage rails increases Ids. If you must have 1.5A Ids, just increase the rail voltages.
The IXYS hockey puck that I had on hand and used is the IXTN210P10T. This part at -30V at -2A bias is about 10% of DC SOA and less than 10% of rated max power dissipation.
Looking forward to trying this further when my Tokin SITs show up.
I have not observed anyone doing exactly this so it looks like a fun thing to try. Fortunate that I had the IXYS pucks on hand.
believe me , you don't want to know what I did while thinking what to do , and finally got to SissySIT
in fact , having pair of N and pair of P mos pucks , mein Bruder Generg sent me when I drew first draft of Babelfish M25 , I tried them to combine with THF51 I had at a time
as far as I remember , I got a pair of , met at some 2A2 and rail of 27V , but just one pair ...... and it wasn't a recipe for what I wanted to make in the end
so , approach good for making one specimen of an amp , but tricky for more
that's why Pa made just few "pure" DEFiSIT amps , as proof of concept for later made SIT-3
in fact , having pair of N and pair of P mos pucks , mein Bruder Generg sent me when I drew first draft of Babelfish M25 , I tried them to combine with THF51 I had at a time
as far as I remember , I got a pair of , met at some 2A2 and rail of 27V , but just one pair ...... and it wasn't a recipe for what I wanted to make in the end
so , approach good for making one specimen of an amp , but tricky for more
that's why Pa made just few "pure" DEFiSIT amps , as proof of concept for later made SIT-3
Thank you. All of that info is news to me and very interesting news, indeed.
I agree that the spread of component behaviors will cause the matching of DEF pairs to be time consuming and problematic for mass production.
Given a large enough population of parts, I think that many matched pairs could be found. It would make repair in-situ difficult if not impossible.
None of the problems are of significant importance for DIY.
For me, one of the most important points is that the P-FET is in production and available at Mouser/Digikey/etc
I have performed some more curve tracing, circuit lash-ups with an adjustable + / - power supply and a lot of reading of the DEF and DEFiSIT threads.
I am satisfied that if the SITs are well matched and the P-FETs are well matched, it should be possible to put together sets of quad devices to make a stereo amp. Both channels should bias up nearly identically.
Each quad will have a unique power supply requirement to achieve a certain bias current using no bias circuitry.
Another option is to use the resistor string trick to bias the devices at a certain current at a certain rail voltage.
For mass production, such as a DIY group buy, the resistor string trick would be the obvious choice.
For the devices that I have in hand, the Vgs voltage difference between the SIT and the P-FET is less than 200mV to create 1.5A of bias at 24V Vds.
I will give the resistor string trick a try for the next step.
I am satisfied that if the SITs are well matched and the P-FETs are well matched, it should be possible to put together sets of quad devices to make a stereo amp. Both channels should bias up nearly identically.
Each quad will have a unique power supply requirement to achieve a certain bias current using no bias circuitry.
Another option is to use the resistor string trick to bias the devices at a certain current at a certain rail voltage.
For mass production, such as a DIY group buy, the resistor string trick would be the obvious choice.
For the devices that I have in hand, the Vgs voltage difference between the SIT and the P-FET is less than 200mV to create 1.5A of bias at 24V Vds.
I will give the resistor string trick a try for the next step.
I connected the circuit with no bias resistors. The drain current is in the neighborhood of 600 - 700mA depending on temperature. You can actually calculate what the current will be from Nelson's formula based on the difference of Vgs divided by the sum of the inverse transconductances.
I can see that a version can be created with a pot between the gates and another pot to set the voltage at the bottom gate. This would allow adjusting drain current and offset.
The P-FET that I am using has a higher Vgs than the Vgs of the SIT at 24V Vds at 1.5A.
The supply voltage rails can be increased until Ids is at the desired level but that would mean finding a proper transformer and every person who wants to build it will have a different power supply solution. Adding the resistor string will allow every person who builds it to use the same power supply and the same Ids.
All of the measurements above are without heatsink for the Tokin SIT. With a heatsink for the IXYS hockey puck P-FET.
Today I drilled and tapped a heatsink for the Tokin SIT.
One of the tapped holes is to mount a Vishay threaded head 5k ohm thermistor.
Vgs measurements over temperature ongoing now.
From initial observation, the Tokin SIT Vgs moves 12mV between 35 deg C and 50 deg C at 24V Vds at 1.5A Ids.
My guess is that the hockey puck P-FET Vgs moves a lot more over that temp range since.
It would make sense for the bottom bias voltage to be adjustable and make the spread between the two gates adjustable.
Today I drilled and tapped a heatsink for the Tokin SIT.
One of the tapped holes is to mount a Vishay threaded head 5k ohm thermistor.
Vgs measurements over temperature ongoing now.
From initial observation, the Tokin SIT Vgs moves 12mV between 35 deg C and 50 deg C at 24V Vds at 1.5A Ids.
My guess is that the hockey puck P-FET Vgs moves a lot more over that temp range since.
It would make sense for the bottom bias voltage to be adjustable and make the spread between the two gates adjustable.
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Running these devices in tandem as a follower pair on the bench now. Using + / - supplies to allow me to easily see balance of the two halves.
The bias current and offset voltage is very temperature dependent.
At 50 deg C and 1.5A bias and as close to zero offset as possible, the Vgs values are -3.26v for the Tokin SIT and -3.568v for the IXYS puck.
The transconductance of the Tokin SIT at temp at 1.5A Ids is ~2.8 and the transconductance of the IXYS puck is ~12.
The tempco of the IXYS puck is ~10x the tempco of the Tokin SIT
I am wondering if degenerating the P-FET puck would help with matching the tempco of the parts better?
.... or the bias circuit needs one or more thermistors.
The bias current and offset voltage is very temperature dependent.
At 50 deg C and 1.5A bias and as close to zero offset as possible, the Vgs values are -3.26v for the Tokin SIT and -3.568v for the IXYS puck.
The transconductance of the Tokin SIT at temp at 1.5A Ids is ~2.8 and the transconductance of the IXYS puck is ~12.
The tempco of the IXYS puck is ~10x the tempco of the Tokin SIT
I am wondering if degenerating the P-FET puck would help with matching the tempco of the parts better?
.... or the bias circuit needs one or more thermistors.
Thanks. I just inserted a ceramic 0.22R multi-watt resistor and re-adjusted the bias. -3.2v on the Tokin SIT and -3.9v on the IXYS puck.
The inserted resistor increases the spread of the gate voltage differential.
The behavior of the Vgs vs temperature is now much slower and easier to dial-in.
I adjusted the bias at 1.5A and offset for 0 for 45 deg C or so.
On a really large heatsink, at room temp, the initial offset is 4.5V and is slowly drifting down. The initial bias is 1A.
I will see how things look after an hour of warm-up.
Thanks again for for sharing your knowledge.
Hello ZM
As you suggest, I re-read the DEFiSIT schematic by Nelson and listened to his BAF 2016 lecture.
I am playing with only the output stage and using the Tokin SIT and the IXTN210P10T.
I used independent voltage sources for the two gates and determined the setting for Vgs at 1.5A for + / - 24V Vds.
I tried with and without degen resistor.
The temp coefficients of the transistors biased independently causes lots of bias instability without degen. With degen, the bias is more stable but the spread of the gate voltages approaches 1V.
Next I removed the degen resistor, tied the gates together and floated them with a 220K resistor returning current to common(gnd).
As an aside, I measured gate current at 50 deg C. The Tokin SIT draws 200nA at room temp and draws 800nA at 50 deg C. The Puck P-FET gate draws less than 1nA.
I raised Vds until I measure close to 1.5A at 50 deg C. That happens at +/- 29V Vds. The actual current was 1.45A.
For the time being, I conclude that it will make more sense to source a special transformer to use the Tokin SIT and the IXYS puck rather than obtain and sort through an ocean of P-FETs to match the Tokin SIT at + / 24V.
It was fun to characterize the DEFiSIT pair over temp at different biasing arrangements. I ordered some more P-FETs and will sort them for the best matched pair. They are expensive little buggers at USD $36/each.
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