M2 edcor transformer specs

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> Even with perfectly Idss matched JFETs you don't get zero offset. So trim pot seem always necessary.

That is not our experience, and we have matched thousands.
We regularly have NP matched pairs as followers with less than 0.3mV offset.
The pre-requisite is that you use a near zero tempco resistor for current sensing (we use S102's).
Allow your voltmeter to reach steady state, and calibrate it against a know voltage reference.
The Vds applied has to be the same.
And of course the JFET has to be at a controlled temperature.

Even without all the above controlled test environment, we never get any offsets more than 2~3mV.

We have had people who told us they had JFETs matched by some popular USB "curve tracer".
Only to find that they were actually out by a lot when cross checked with a multimeter.


Cheers,
Patrick
 
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Since the M2 already includes a coupling capacitor (between the Edcor transformer and the MOSFET gates), you could consider adding a second coupling capacitor to completely eliminate DC offset. The second coupling capacitor would be inserted between the JFET buffer and the transformer primary.

This second coupling capacitor allows you to match the two JFETs on other criteria besides DC offset; for example you could match gm. Or you could match Idss, or you could match Vpinchoff, or you could tune the trimmer potentiometer to get just the right amount (to your ears) of negative phase second harmonic distortion, and so forth.
 
Also another remark.

There are other people here selling N-P matched JFETs with 5.1R source degenration included in the matching of 2SJ74.
This originates from us in the F5X project in order to equalise the transconductance between 2SK170 and 2SJ74, at around 8mA.
The difference in Idss is, by coincidence, around 0.7mA, higher for the 2SJ74.

All NP matched JFETs supplied by us for our projects should include the 5R1 degeneration resistor.


Patrick
 
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