F4 Beast Builders

Based on tips from Papa, and using IXYS Hockey Pucks let's see your F4 Beast builds (might come up with a better name later). It's up to you to decide what to use for the 2 gain stage front end circuit.
The aim here is to have fun building (not necessarily cloning down to the last detail).

Suggested hockey pucks so far, are as follows (probably add a couple more later):

P Channel
IXTN40P50P (Out of 5 measured for transconductance, averaging around 6.8S at 2A and 52C measured at the interface of the heatsink and edge of hockey puck)
IXTN90P20P
IXTN32P60P

N Channel
IXFN48N60P (Out of 5 measured for transconductance, averaging around 6.4S (same conditions as above))
IXFN44N80P Patrick's suggestion
IXFN40N90P needtubes suggestion

I don't think there is a right answer to what is best, it depends what you want to achieve.
They are all in the ball park. No bbq stopper here.

I have measured up 48N60P and 40P50P and they appear to be a nice match.

Papa's Tips (for the greedy boys) :D
I will tell you this so that you can reverse engineer it:

Three stages, DF is about 700, high current, high slew, .00x% distortion,
40 uV output noise, big Class A envelope, 25 watts into 8, 100 watts into 2.

And it sounds great.

As to biasing, you can do it the regular way, or you can just use a big sink
and adjust the value until it settles into where you want it - just takes a
little longer warm-up time.

In any case, the drift of Ids against temperature is quantifiable and can be
easily handled without degeneration if you have adequate sinking and are
willing to do lengthy adjustment and put up with longer warm-up times.

Just things that DIYers are good at and commercial manufacturers are not.


Here is the front end for my beast, I'm not giving resistor values, use ya brain my dear fellow dumb bastards.

R14/R8 and R16/R9 are biasing trimpots, as seen around here in other circuits, just calculate the appropriate value required.

F4%20Beast%20Front%20End.png




Assembling Output Stage

20170110_004204.jpg
 
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Hockey Puck puzzle

All thanks to Nelson for unique box of bricks,

so here comes my Hockey Puck Puzzle.....:):):)

combined from

F4 and Sony II bias system, NTC added

and Sony II frontend

and F4 like output stage without source resistors....

Have fun!

Tell me if you see errors, I use to make them....

so I got an error specialist....:D:D

and thanks to 2picodumbs hosting me.
 

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All thanks to Nelson for unique box of bricks,

so here comes my Hockey Puck Puzzle.....:):):)

.
That is essentially what I have.
The only difference between your front end circuit and mine is slightly different resistance values in the feedback loop (but that may change again), zero source degeneration through out entire circuit, but I may change that to zero degeneration on jfets, then 5 to 10 Ohms on 2sk2013/2sj313.

Edit: I was also considering using Laterals (just to be a little different) with zero source degeneration instead of 2sk2013 and 2sj313, but I'll wait and see to decide.
 
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@2picodumbs

yes you can run J-Fets with 6-7mA Idss without source resistors, I just see I put in 22R in my frontend. This high value is due to the Spice model of my J-Fets having around 12mA Idss.

So if someone has 8-10mA Idss the normal 10R for source resistors is the better choice...!
 
...so here comes my Hockey Puck Puzzle.....:):):)

This is similar to what I have modeled, except for the following:

1. No degeneration resistors anywhere
2. Different "coupling" of the driver to the outputs like in the UGS/UP which avoids capacitors in the signal path, but might make bias touchy
3. No cascode on the JFETs
4. IRF610/9610 MOSFET drivers instead of the Toshiba parts (too afraid to test with my precious Toshibas)

The model, for what its worth, looks fantastic. With luck, I will be able to find time to cobble this together some time in the next month...

Now, the important question for generg: How does it sound? Edit: you were four minutes earlier than me.
 
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In post #130 http://www.diyaudio.com/forums/pass-labs/299383-pass-xa25-13.html#post4906864 I discussed bias circuits for the output fets. There is an LTSpice simulation comparing 3 bias circuits for an IXTN40P50P operating between 25C and 75C with 24V rail voltages, and 1.3A (approx) bias current.

  • Constant Voltage Bias
  • Thermistor Controlled Constant Current Bias
  • Opamp Servo Constant Current Bias
The plots show Vgs and Id for the FET vs. Temperature. As expected the bias current increases with temperature for the Constant Voltage circuit.

The Thermistor Controlled Constant Current circuit tracks very well with the "ideal" Constant Current Servo.
 

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Thank you lhquam! Very usefull to know that the Thermistor Controller System can do well. To show this in this way is so valuable.

In post #130 http://www.diyaudio.com/forums/pass-labs/299383-pass-xa25-13.html#post4906864 I discussed bias circuits for the output fets. There is an LTSpice simulation comparing 3 bias circuits for an IXTN40P50P operating between 25C and 75C with 24V rail voltages, and 1.3A (approx) bias current.

  • Constant Voltage Bias
  • Thermistor Controlled Constant Current Bias
  • Opamp Servo Constant Current Bias
The plots show Vgs and Id for the FET vs. Temperature. As expected the bias current increases with temperature for the Constant Voltage circuit.

The Thermistor Controlled Constant Current circuit tracks very well with the "ideal" Constant Current Servo.