One pair of JFETs can drive two pairs of vertical MOSFETs.
Two pairs of vertical MOSFETs have capacitance ~7nF.
4 pairs of lateral MOSFETs have capacitance ~4nF. If there is sufficient current for verticals, there is sufficient current for at least 3 times the number of laterals.
There is no reason to use two pairs of JFETs, and is the main reason things are not going well for you. With one pair your drain resistors will be at a level where OLG is sufficient. Going to GR grade devices will be of great help here, though too little drive current also has its issues.
There is no reason to omit the source resistors with laterals. I tried and it resulted in very dull HF presentation, almost exactly the problem you are facing. It is possible to make it work and get very good results, but not the way you are approaching it.
You could choose to abandon it, but that's the easy way out.
Good luck
Two pairs of vertical MOSFETs have capacitance ~7nF.
4 pairs of lateral MOSFETs have capacitance ~4nF. If there is sufficient current for verticals, there is sufficient current for at least 3 times the number of laterals.
There is no reason to use two pairs of JFETs, and is the main reason things are not going well for you. With one pair your drain resistors will be at a level where OLG is sufficient. Going to GR grade devices will be of great help here, though too little drive current also has its issues.
There is no reason to omit the source resistors with laterals. I tried and it resulted in very dull HF presentation, almost exactly the problem you are facing. It is possible to make it work and get very good results, but not the way you are approaching it.
You could choose to abandon it, but that's the easy way out.
Good luck
Yes Sangram, All about what you've said about capacitance was what I were thinking to.
Today I corrected my LTSPICE-files and did some Sims.
Without cascoded Jfet's it worked better,but best drive was when I also dumped the BJT's.
The only problem seems to be high dissipating for Jfets, about 300-400 mW.
And of course, I haven't checked distortion and gain numbers yet...
I was also thinking of splitting the PSU in two, one for inputstage and one for outputstage.
It could be an advantage if rails sag at difficult loads, but maybe this I mostly a problem at testing with continous sinewaves, not in real life ?
Regards
Figge
Today I corrected my LTSPICE-files and did some Sims.
Without cascoded Jfet's it worked better,but best drive was when I also dumped the BJT's.
The only problem seems to be high dissipating for Jfets, about 300-400 mW.
And of course, I haven't checked distortion and gain numbers yet...
I was also thinking of splitting the PSU in two, one for inputstage and one for outputstage.
It could be an advantage if rails sag at difficult loads, but maybe this I mostly a problem at testing with continous sinewaves, not in real life ?
Regards
Figge
Hi.
I started with som measuring when I got home, then I can take a nap before lunch
R5 is 64r4 and drop is 0v835.
R6 is 81r3 and drop is 1v018.
Rail voltage is +/- 33v4.
Bias is set to 1 amp, dc offset 17mV but amp isn't warmed up.
R3's drop is 0v114 and R4 isi 0v105, still cascoded, havn't had time to change it yet. Anyway, it means ~11,6 and 10,7 mA as R's and P3 has 9r8 as centerpoint.
I am also thinking of how to mount sourceresistors on output-PCB. There isn't really space for them, but I guess that I could cut trace with Dremel and solder them under pcb directly to traces.
Question is what value I should choose, 0r22, 0r33 or 0r47 ?
Is there a way to calculate it ?
And when I simulated with 1kHz sinewave, and in real life testing, I get about 21 Vrms in 8 ohms, 14 Vrms at 4 ohms and 9 Vrms in 2 ohms.
Is that because of low gate-drive voltage wich results in low amps output from mosfets ? Rail doesn't sag that much, only a volt or so.
Regards
Figge.
I started with som measuring when I got home, then I can take a nap before lunch
R5 is 64r4 and drop is 0v835.
R6 is 81r3 and drop is 1v018.
Rail voltage is +/- 33v4.
Bias is set to 1 amp, dc offset 17mV but amp isn't warmed up.
R3's drop is 0v114 and R4 isi 0v105, still cascoded, havn't had time to change it yet. Anyway, it means ~11,6 and 10,7 mA as R's and P3 has 9r8 as centerpoint.
I am also thinking of how to mount sourceresistors on output-PCB. There isn't really space for them, but I guess that I could cut trace with Dremel and solder them under pcb directly to traces.
Question is what value I should choose, 0r22, 0r33 or 0r47 ?
Is there a way to calculate it ?
And when I simulated with 1kHz sinewave, and in real life testing, I get about 21 Vrms in 8 ohms, 14 Vrms at 4 ohms and 9 Vrms in 2 ohms.
Is that because of low gate-drive voltage wich results in low amps output from mosfets ? Rail doesn't sag that much, only a volt or so.
Regards
Figge.
Hi
Those voltages look real low for 500mA per device, mine are closer to 1.4-1.5V. However, here you see the problem, front end gain is 6.4x, and your feedback ratio requests a gain of 11. It is not possible, hence the poor performance.
Since you cannot measure the current through individual devices if you don't have the source R, you can use the measurement across the R of the CRC in the supply.
I used 0.47 and 0.39, I feel sound is bit better with the higher R, but you get a bit more swing with the lower R. You can choose it as per your needs. I thought the store boards had a source R position? Or are these custom boards? The source resistor value affects the output stage transcoductance, and the basis for calculating it (or discovering its effects) were posted by Nelson the F5 threads. I have very little idea of how to find it in the gazillion posts, though.
To your earlier post, 300-400mW is not acceptable for a 400mW part. Get lower IDss JFETs and you can start looking at reclaiming some of the lost gain and pull back the dissipation to a safe level. You will not need more than 5mA through the front end to handle the MOSFET gate capacitance. And you can drop a very little bit across the cascode, even a saving of 10V will help ease the stress on the input pair.
Those voltages look real low for 500mA per device, mine are closer to 1.4-1.5V. However, here you see the problem, front end gain is 6.4x, and your feedback ratio requests a gain of 11. It is not possible, hence the poor performance.
Since you cannot measure the current through individual devices if you don't have the source R, you can use the measurement across the R of the CRC in the supply.
I used 0.47 and 0.39, I feel sound is bit better with the higher R, but you get a bit more swing with the lower R. You can choose it as per your needs. I thought the store boards had a source R position? Or are these custom boards? The source resistor value affects the output stage transcoductance, and the basis for calculating it (or discovering its effects) were posted by Nelson the F5 threads. I have very little idea of how to find it in the gazillion posts, though.
To your earlier post, 300-400mW is not acceptable for a 400mW part. Get lower IDss JFETs and you can start looking at reclaiming some of the lost gain and pull back the dissipation to a safe level. You will not need more than 5mA through the front end to handle the MOSFET gate capacitance. And you can drop a very little bit across the cascode, even a saving of 10V will help ease the stress on the input pair.
Hi Trollet
The use of 2sk1530y/2Sj313y is a good choice since you get higher transconductance and also higher Vgsoff so you can increase the input stage gain accordingly. Make sure you use the "y" grade for higher vgsoff. See an example here:
http://www.quebecdiy.net/t768-f5-avec-la-recette-ussa
Or if you want to keep your precious lateral fet you can try something like in this thread:
Amplificateur USSA-3: version Latéral et "all Fets "- conception
It consists of using a voltage shifter/buffer between the input stage and output stage to increase the input stage gain. This allows to have higher damping factor.
Good luck
Fab
The use of 2sk1530y/2Sj313y is a good choice since you get higher transconductance and also higher Vgsoff so you can increase the input stage gain accordingly. Make sure you use the "y" grade for higher vgsoff. See an example here:
http://www.quebecdiy.net/t768-f5-avec-la-recette-ussa
Or if you want to keep your precious lateral fet you can try something like in this thread:
Amplificateur USSA-3: version Latéral et "all Fets "- conception
It consists of using a voltage shifter/buffer between the input stage and output stage to increase the input stage gain. This allows to have higher damping factor.
Good luck
Fab
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Three things..
First.. You have to sort out the bias points of the output devices, for that just add two 0.1 ohm each in series with the plus and minus power rails so you can measure the total current flow.
Second, You want to increase the gain.
By using the MUR-diodes...
But this time not to bypass the source resistors, but instead of source resistors.
You do this is in order to add some "rail to gate" voltage so you can increase the R5-R6 resistors, and therefore increase the voltage swing driving the output mosfets.
Do not use source resistors at all.
You also seem to have an imbalance in the devices somewhere, better if you measure your output devices and see if they have the P to N matching, For pinch point and GM, and better compensate the circuit accordingly.
First.. You have to sort out the bias points of the output devices, for that just add two 0.1 ohm each in series with the plus and minus power rails so you can measure the total current flow.
Second, You want to increase the gain.
By using the MUR-diodes...
But this time not to bypass the source resistors, but instead of source resistors.
You do this is in order to add some "rail to gate" voltage so you can increase the R5-R6 resistors, and therefore increase the voltage swing driving the output mosfets.
Do not use source resistors at all.
You also seem to have an imbalance in the devices somewhere, better if you measure your output devices and see if they have the P to N matching, For pinch point and GM, and better compensate the circuit accordingly.
Last edited:
http://www.diyaudio.com/forums/pass-labs/221267-other-mosfets-f5.html
http://www.diyaudio.com/forums/solid-state/59339-profet-amplifier.html
http://www.selectronic.fr/media/pdf/4180.pdf
So lateral F5 is at least possible.
Some like it, some don't.
Using GR grade JFETs get you some more gain.
It also helps if you reduced the closed loop gain as well.
Patrick
http://www.diyaudio.com/forums/solid-state/59339-profet-amplifier.html
http://www.selectronic.fr/media/pdf/4180.pdf
So lateral F5 is at least possible.
Some like it, some don't.
Using GR grade JFETs get you some more gain.
It also helps if you reduced the closed loop gain as well.
Patrick
Hi everyone
It was a lot of useful information from all of you.
It seems that the best solution is to put in the SJ201Y/SK1530Y's I have.
I've got 16 pairs and I can get 4 grops of matches (not N & P, but anyway) and I also got 35 pairs SJ200Y/SK1529Y, but 12 pairs are for my Phonic PWA2500-amp, just getting back-engineered (Something with protection Circuit
).
And, like Zen says, the SJ55/SK175's are for sale here: http://www.diyaudio.com/forums/swap-meet/295765-fs-hitachi-sj55-sk175.html
If anyone have anything intresting to swap with, send a PM
I have 300 pairs so I will try a more powerfull AB-amp with them, don't know wich yet.
Regards:
Figge.
It was a lot of useful information from all of you.
It seems that the best solution is to put in the SJ201Y/SK1530Y's I have.
I've got 16 pairs and I can get 4 grops of matches (not N & P, but anyway) and I also got 35 pairs SJ200Y/SK1529Y, but 12 pairs are for my Phonic PWA2500-amp, just getting back-engineered (Something with protection Circuit
).And, like Zen says, the SJ55/SK175's are for sale here: http://www.diyaudio.com/forums/swap-meet/295765-fs-hitachi-sj55-sk175.html
If anyone have anything intresting to swap with, send a PM
I have 300 pairs so I will try a more powerfull AB-amp with them, don't know wich yet.
Regards:
Figge.
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