circuit is good , but I was (sort of ) replying on vdi_nenna's post .....
Gate and Source are tied together in the picture so Vgs is 0. Is that the right answer? Not measuring Vgs with this circuit but Idss.
I found another post by John Curl describing something similar but he puts the resistor between the V+ and the drain, S+G goes straight to ground. Does this make any difference in the Idss reading whether you measure Vdrop between V+ and D or between G+S and ground?
I guess I can find out but I'm in the middle of (finally) measuring/matching my jfets from before retiring from DIY and don't want to touch the setup I've been using until after I'm done.
For measuring P-channel jfets, do you just flip the battery terminals (using a 9V battery) and keep S+G tied together to battery +, drain to battery -?
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