directly coupled class A buffer for low-voltage headphones (work-in-progress)

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I have a 1khz ultra-pure sine wave generator on order, and when it arrives these are the sorts of comparisons I’d like to start making (I suppose I could go ahead and build the circuit and give it a listen while waiting :)

One thing to consider is that an active ground means I don’t need an ideal voltage power supply. Some residual ripple is fine, because both the channels and the ground work together to eliminate it. If I did away with the active ground, I would need to be much more careful with my voltage supply.
 
No output coupling cap is especially useful for extra low Z IEMs also.

I seen this virtual ground techinique before with Szekeres VE and wondered if it's for simplicity sake or has benefits soundwise.
A bit similar to global feedback in that you are correcting things at the output error rather than starting off with well regulated supply, but at the same time it would allow a simpler/passive solution for the supply which is going to have its own influence on sound... or going beyond and feeding a well regulated supply to the virtual ground.
 
One way to think about this would be to imagine the circuit starts out with no current flowing. I imagine the fet source being all the way up at ground, so Vgs is zero, the fet is totally off.

The constant current source isn’t happy with this, so it starts pulling the source down towards -V. As it pulls the source down, Vgs grows and the fet starts to turn on. When the right amount of current flows, the current source stops pulling and the circuit sits at equilibrium.

Now, as an AC signal appears on the gate, centered around ground, the negative going part is easy to think about. Vgs decreases, which causes the fet to try to turn off. The current source doesn’t allow this and pulls the source even further down.

The positive going half of the AC signal works in the opposite way. Vgs starts to increase, so the fet turns on harder, allowing more current. The current source responds by pushing the source further up to limit the current again.

The part which is a bit tricky is to realize that the gate can go above the drain and the circuit still works. This is easier to think about in a more typical voltage situation. Imagine 5volts being on the drain, and source being at ground. If we put 5 bolts on the gate, the fet will start to conduct. Of course, if we put 10 volts on the gate, or 15, the fet just tries to turn on even harder. It doesn’t matter that only 5 volts is on the drain.

:)
 
The only caveat here is that the fet can run out of headroom and start to clip if Vgth isn’t large enough to allow for an input signal of a certain size. In my case, my IEMs are sensitive enough that 0.2V rms is more than plenty. This is a small voltage relative to the gate threshold voltage of a 2N7000, so there is no problem.
 
As an example, consider a fet with a threshold such that the current source needs to pull the fet source down to -0.5 volts in order to turn the fet on enough to get the 100mA bias current to flow. If a positive going 0.6V appears as input, this will obviously clip, because it is impossible for the current source to push the fet source to +0.1V, because it is impossible to push the source above the drain.
 
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