Sanity-check + end-result: a x 1000 measurement preamplifier

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Yes, that was one of my prioritary concern.
Here is the simulated response: it is quite accurate for the LF response (not for HF, because there are additional real-world equalization measures)

I designed the CCS/gyrator to operate mostly on its own, but nested within the global loop with just a small correction from the servo, because it reduces the gain of the servo loop.

It minimizes the possible issues of bump and dip you alluded to, and also minimizes servo wind up issues, because of its limited action.
R13 also blunts the raw loop gain available from the opamp + Fet, making the thing more manageable

Simulation is always half of the answer... BTW, the condition to have flat LF response is analytically rather trivial, R5*C5=R12*C6 (without R13 and R16). I am surprised though you got such a low frequency cutoff, based on the schematic, it should be 5Mohm*1uF/2*PI=1.4Hz, yours seem to be well under 1 Hz, strange, could be some bootstrapping effect hidden in that complex network around the compensation. Unfortunately I'm not a LTSpice user to be able to check your results.

With R13 and R16 you also have thrown away a good chunk of the +PSRR provided by the current source load.

Raw loop gain is never a bad thing if you know how to manage it.

Without R13 and R16, the servo op amp will not have to jump more that a few 100's of mV to make Ic=Id and stabilize the output at 0V.

Connecting C2 to the supply rail is also questionable, that's a very easy way to allow power supply noise to be injected in the op amp non inverting input. The input referred noise contribution will still be divided by the first stage gain (which you on purpose killed with R13 and R16, BTW) but (intuitively) connecting C2 to ground would make IMO much more sense.
 
100mH is nothing at all, BUT commercial chokes having a low Rdc are intended for high current applications, meaning a large airgap, a lot of iron and a lot of copper to achieve a high saturation threshold.
....
Here is a suitable example: 2 x 82mH, 150mΩ:
PH9455.826NL Pulse Electronics | Mouser Europe

It will result in a 320mH, 300mΩ inductor and costs 6.65€

Thanks, that seems interesting.

I was looking for something ready made; a year ago I did a lot of experiments
with EDT cores and later with MA/com and Pulse Engineering ferrite transformers
on 500 KHz. That was no fun; I stripped those SMD transformers and rewound them
under the microscope with 0.1mm wire; it only takes an inch or two. I tried to get
cheap voltage gain / impedance match from them; but behind a fast, low impedance
CMOS switch weird things happen. Stray inductance, asymmetry, charge injection
conspired to deliver unpredictable results.

And those MAcom and Pulse devices are little gems. The ferrite they've got
is excellent and they somehow manage to operate them as real transmission line
transformers. Even when I tried an 1:4 or so, it was worse than the original. :(

But the problem I had this week was that I had +/-20 mV spikes caused by charge
injection and after +40 to +46 dB amplification that is a few volts at the output of the
amplifier, even though the signal proper was just above the grass.

Making the spikes lower & wider would at least avoid saturating the lo noize preamp;
luckily I found a solution to bias the switches so the charge injection is minimized.
The optimum is quite sharp; it feels like tuning a bridge and varies from chip to chip,
so there is no easy paralleling of the switches to get low on resistance.
cheers, Gerhard
 
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Unfortunately the link to the ultimate 100,000 turn version is now broken. I found a fairly modest (by their standards) octoloop and an audio output transformer backwards (4 Ohm tap) did fairly well at resolving the Schumann resonances.
This reminds me of a customer with a 2 ton geoformer that was picking up the 16.66Hz European legacy railway power.
 
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Simulation is always half of the answer... BTW, the condition to have flat LF response is analytically rather trivial, R5*C5=R12*C6 (without R13 and R16). I am surprised though you got such a low frequency cutoff, based on the schematic, it should be 5Mohm*1uF/2*PI=1.4Hz, yours seem to be well under 1 Hz, strange, could be some bootstrapping effect hidden in that complex network around the compensation.
I wanted to go comfortably below 1Hz, but I preferred to do it without further increases of C5 and C6, so I used a low frequency bump to compensate the natural roll-off.
The local feedback from R13 helps in damping, thus achieving a close to perfect equalization.
Compared to a plain-vanilla solution, I get a significant LF extension, without additional resources

With R13 and R16 you also have thrown away a good chunk of the +PSRR provided by the current source load.

..../.....

Connecting C2 to the supply rail is also questionable, that's a very easy way to allow power supply noise to be injected in the op amp non inverting input. The input referred noise contribution will still be divided by the first stage gain (which you on purpose killed with R13 and R16, BTW) but (intuitively) connecting C2 to ground would make IMO much more sense.
The philosophy I followed was to reference the input part of the circuitry to the ground for obvious reasons, but I chose to reference the output section to the positive rail, because the gyrator is naturally anchored to it, due to R1, C6 and R13.
This means that the connection of C2 to the + was also necessary, because tying it to the ground would apply the PS noise directly to the opamp, in differential mode.
With everything connected to the +, the noise is applied in common-mode, and the PSRR becomes basically the CMRR of the opamp, which should not be too bad, and anyway the supply has a low noise to begin with, supplemented by a local RLC filtering.

Regarding the impact of the wasted gain on the noise performance, it is completely negligible: the sim shows the total noise (green), and the contribution of the FET alone (red).

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The difference is very small, and in addition it has mostly other origins.


BTW, I tested (in sim) the idea of a series inductance to clean up the input quirk.
With no added input capacitance or inductance, there is a 0.4dB bump at 350kHz for a 5K source impedance:

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When a 1.5µH is added, nothing seems to change:

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Does it do any harm?
Apparently, with the inductor and a ~zero source impedance, the behavior looks unaltered:

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However, if the sim frequency is increased to 100MHz, a very sharp and nasty peak appears at 15MHz:

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In practice, this means that the circuit would oscillate at that frequency.
The inductor parameters are reasonable: 100m series resistance, 5K //.

It is possible to push the peak higher or lower in frequency by changing the inductor's value, but it cannot be eliminated.
This confirms my gut feeling (and my experience) that it could create problems, not solve them.

These are just sims, of course, but when something does not work in sim, the chances it works in reality are very slim (the opposite is not necessarily true)
 

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The philosophy I followed was to reference the input part of the circuitry to the ground for obvious reasons, but I chose to reference the output section to the positive rail, because the gyrator is naturally anchored to it, due to R1, C6 and R13.

This means that the connection of C2 to the + was also necessary, because tying it to the ground would apply the PS noise directly to the opamp, in differential mode.

With everything connected to the +, the noise is applied in common-mode, and the PSRR becomes basically the CMRR of the opamp, which should not be too bad, and anyway the supply has a low noise to begin with, supplemented by a local RLC filtering.

BTW, I tested (in sim) the idea of a series inductance to clean up the input quirk.

When a 1.5µH is added, nothing seems to change:

Does it do any harm?
Apparently, with the inductor and a ~zero source impedance, the behavior looks unaltered:

However, if the sim frequency is increased to 100MHz, a very sharp and nasty peak appears at 15MHz:

In practice, this means that the circuit would oscillate at that frequency.
The inductor parameters are reasonable: 100m series resistance, 5K //.

It is possible to push the peak higher or lower in frequency by changing the inductor's value, but it cannot be eliminated.
This confirms my gut feeling (and my experience) that it could create problems, not solve them.

These are just sims, of course, but when something does not work in sim, the chances it works in reality are very slim (the opposite is not necessarily true)

That's (using the op amp CMRR to reject the supply noise) is (partially) valid only if you insist using R16/R13. Without, the inverting input won't see any supply noise and C2 will inject noise. Have you tried to simulate the amp CMRR?

An (almost) ideal inductor will always find some capacitance to resonate with. In this particular case, simulations are very poor in estimating the complex input impedance of the JFET (due to the very poor JFET model template) in particular when a feedback loop is closed. I can guarantee it won't oscillate, I tried input small inductors for up to 64 BF862 in parallel. One experimental result was that the lower the Id, the higher the required inductance to keep the amp stable. At Id~Idss=16...20mA 8 BF862 jfets in parallel are stable with 1uH each, which is an equivalent of 125nH total. Note that your J110 has 50% more Ciss capacitance compared with the BF862 and 125% more than the 2SK3557, this is not helping with stability either.
 
That's (using the op amp CMRR to reject the supply noise) is (partially) valid only if you insist using R16/R13. Without, the inverting input won't see any supply noise and C2 will inject noise.
It is obvious that I would have opted for a ground reference without R13.
It is equally obvious that with R13 present, a + rail reference is the way to go.
Have you tried to simulate the amp CMRR?
No, because simulating it with the AD823 instead of the LF357 would make little sense.
Anyway, this does not bother me too much: at low frequencies, the opamp has a good CMRR, and at higher frequencies the local supply bypassing kills any possible noise.
An (almost) ideal inductor will always find some capacitance to resonate with. In this particular case, simulations are very poor in estimating the complex input impedance of the JFET (due to the very poor JFET model template) in particular when a feedback loop is closed. I can guarantee it won't oscillate, I tried input small inductors for up to 64 BF862 in parallel. One experimental result was that the lower the Id, the higher the required inductance to keep the amp stable. At Id~Idss=16...20mA 8 BF862 jfets in parallel are stable with 1uH each, which is an equivalent of 125nH total. Note that your J110 has 50% more Ciss capacitance compared with the BF862 and 125% more than the 2SK3557, this is not helping with stability either.
Something that works with your particular circuits is not suited to mine: for example, I do not see how a 1.5µH could have an influence on the behavior at 350kHz when the source resistance is several K: its reactance is something like 3.5 ohm, thus completely negligible.
If the problem occurs at a higher frequency and/or a lower impedance level, it could have an influence, but that is not the case here.
 
It is obvious that I would have opted for a ground reference without R13.
It is equally obvious that with R13 present, a + rail reference is the way to go.
No, because simulating it with the AD823 instead of the LF357 would make little sense.
Anyway, this does not bother me too much: at low frequencies, the opamp has a good CMRR, and at higher frequencies the local supply bypassing kills any possible noise.

Not sure why you think the PSRR potential issue depends on the op amp only. But then, I’ll leave it there.
 
With this construction you can check how noise on VCC impairs your
input noise density. 60 Ohms is 1nV/rtHz; the VCVS adds it to the clean VCC
with a scale factor of your choice. The 0.1uV offset avoids a LTspice hickup.
Setting E1 = 10 adds 10 nV/rtHz to the clean VCC.

To see the contribution of the VCC noise, just click on the 60 Ohm resistor
when plotting noise density.
 

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Not sure why you think the PSRR potential issue depends on the op amp only.
It doesn't of course, but getting meaningful results either means a global simulation using the right models for all the critical components, or a way to disentangle the contributions of each one to be able to compare the two options (the ground-referenced one could superior, but it also contributes to the leakage of the PS noise)

With this construction you can check how noise on VCC impairs your
input noise density. 60 Ohms is 1nV/rtHz; the VCVS adds it to the clean VCC
with a scale factor of your choice. The 0.1uV offset avoids a LTspice hickup.
Setting E1 = 10 adds 10 nV/rtHz to the clean VCC.

To see the contribution of the VCC noise, just click on the 60 Ohm resistor
when plotting noise density.
Thanks for the tip, it is neat and simple.
I already thought about it, but the solutions I had found were more clunky and far less convenient.
I tested it, and to get a significant impact at 1Hz, I need a factor of 10,000 or 10µV/rtHz. At 1 kHz, it remains relatively insignificant.
That is valid for the AD823 only, but the LF357 would need to be 10's of dB worse to make a difference with more realistic levels.

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In addition, the passive supply filter is not present.
When it is, the noise at 1Hz remains unchanged, logically, but between 10Hz and the rest, it is essentially wiped out (not that it actually matters, but it is good to know)

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Edit:
I just checked, and in fact the 823 is significantly worse on PSRR than the 357, something I never imagined, but it certainly puts the issue to rest
 

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I just checked, and in fact the 823 is significantly worse on PSRR than the 357, something I never imagined, but it certainly puts the issue to rest

Not sure why you cling so hard on the op amp PSRR performance. The noise source due to the imbalanced op amp inputs contribution is outside of the op amp and PSRR of the op amp is largely irrelevant. It's the op amp CMRR that matters much more. Ideally, only the imbalances to the op amp inputs will be amplified.
 
Methinks that should be V(onoise) / gain to see the noise density effect at the input.
gain is predeclared.
Indeed (I am a bit tired), and LTspice can in fact plot it directly, but the individual contributions are always referred to V(onoise), meaning that to make comparisons, one still needs to enter the gain for other traces:

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It brings the contribution of the supply noise to 1.6pV/rtHz@1kHz for 10µV/rt/Hz, which makes it even more irrelevant, but it matters even less.
Not sure why you cling so hard on the op amp PSRR performance. The noise source due to the imbalanced op amp inputs contribution is outside of the op amp and PSRR of the op amp is largely irrelevant. It's the op amp CMRR that matters much more. Ideally, only the imbalances to the op amp inputs will be amplified.
My mistake: I meant CMRR (I am decidedly tired), which is much worse for the 823 than for the 357.
 

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