As others mentioned before, this design is beyond my design skills too
Despite this, I should see schematic and further output measurements like load regulation, to comment further
allthough I think this should be end to a very nice lab psu, at least according to my needs BTW, I think that 4 digit is more suitable for current measurements, as it can give a much clearer view in low loads...
Well, with something like an autorange it would not be necessary I think.
Frex do you think that autorange would be possible ?
JC
Probably not.
The CPLD do many thing in the design, and add a digit will use many logic cells and no much more are available.
The current reading range is 4.096A full scale, so that give 1mA/bit.
We display 3 digits, giving 10mA resolution. It's already thin for a PSU meter ! It's not a "measurement" device ...
But... using a magnified range when current is low ( less than ~400mA) i could shift a digit to give a mA resolution. I think this option is really more feasible and don't need much logic cells.
I add that in my "to do" list...It is beginning to be full ...
Frex
The CPLD do many thing in the design, and add a digit will use many logic cells and no much more are available.
The current reading range is 4.096A full scale, so that give 1mA/bit.
We display 3 digits, giving 10mA resolution. It's already thin for a PSU meter ! It's not a "measurement" device ...
But... using a magnified range when current is low ( less than ~400mA) i could shift a digit to give a mA resolution. I think this option is really more feasible and don't need much logic cells.
I add that in my "to do" list...It is beginning to be full ...
Frex
EPSUX3V2 prototype movie #1
Hello,
As promised, i have made a small movie to show the prototype boards
in use with the display mode and voltage current regulation.
The prototype in the movie uses the CLPD demo board with a 3 digits multiplexed led display with autoscale mode, the two channels DAC for I/V settings, a 8 channels ADC for V/I measurements of each channel, and the "combo" regulator build with TPS5450 buck and LT3801 linear regulator.
I already explain that in the video, but i know my english isn't so good !
To follow...
Regards.
Frex
Video is HERE.
Hello,
As promised, i have made a small movie to show the prototype boards
in use with the display mode and voltage current regulation.
The prototype in the movie uses the CLPD demo board with a 3 digits multiplexed led display with autoscale mode, the two channels DAC for I/V settings, a 8 channels ADC for V/I measurements of each channel, and the "combo" regulator build with TPS5450 buck and LT3801 linear regulator.
I already explain that in the video, but i know my english isn't so good !
To follow...
Regards.
Frex
Video is HERE.
Hello,
Bex83, the project is currently in construction and you can already find the general
synoptic of the PSU on the first page of the thread.
Of course, the full schematic will be available as soon it will be completed (as my others projects).
The final target is to become the project building open and easy to do, a PCB group buy will be
organized for any interested DIYers.
Regards
Bex83, the project is currently in construction and you can already find the general
synoptic of the PSU on the first page of the thread.
Of course, the full schematic will be available as soon it will be completed (as my others projects).
The final target is to become the project building open and easy to do, a PCB group buy will be
organized for any interested DIYers.
Regards
Don't worry, it's because the voltage divider is unbuffered to the ADC input.I solve that soon.
Frex
Great !
JC
Hello,
I don't have published the project progress for a while, busy to work on it !
My time is now mainly dedicated to draw the complete schematic of the PSU.
This step is important and require much time to select, choose, and create
parts in CAD. That also allow me to show many thing in the detailed design.
I love this step...
Of course, to have a little chance to get a fully working rev1 printed circuit board,
a very comprehensive testing a each function is greatly recommended ! .
For that, i work also to complete the combo regulator with two LT3081 to reach
the final output current of 3A and make some serious testing.
Of course, as soon the first rev of the schematic is ready, i will publish it.
Probably before the end of year. (or maybe a crazy DIYers Christmas gift ?).
This time, i don't have movie or picture to make project advancement more
"visual" or web 2.0 friendly. Be sure that in the following I will catch that.
I working too on the CPLD design. It need to be near fully designed to ensure
that it's size is sufficient.
The mechanical integration of the unit is stared too.The previous EPSUX3
design help me to change some problems.
On of them is the difficulty to use the wire connexion on the bananas.
This because the height between it and the bottom of case is too small,
so you always need to lift the PSU to insert the wire. Not very convenient.
In v2 design i plan to use a simple 4mm female bananas,
that are more easy to find, and needs much less space. In counterpart,
a banana plug is always needed. But, what DIYers don't have that ?
Frex
I don't have published the project progress for a while, busy to work on it !
My time is now mainly dedicated to draw the complete schematic of the PSU.
This step is important and require much time to select, choose, and create
parts in CAD. That also allow me to show many thing in the detailed design.
I love this step...
Of course, to have a little chance to get a fully working rev1 printed circuit board,
a very comprehensive testing a each function is greatly recommended !
.For that, i work also to complete the combo regulator with two LT3081 to reach
the final output current of 3A and make some serious testing.
Of course, as soon the first rev of the schematic is ready, i will publish it.
Probably before the end of year. (or maybe a crazy DIYers Christmas gift ?).
This time, i don't have movie or picture to make project advancement more
"visual" or web 2.0 friendly. Be sure that in the following I will catch that.
I working too on the CPLD design. It need to be near fully designed to ensure
that it's size is sufficient.
The mechanical integration of the unit is stared too.The previous EPSUX3
design help me to change some problems.
On of them is the difficulty to use the wire connexion on the bananas.
This because the height between it and the bottom of case is too small,
so you always need to lift the PSU to insert the wire. Not very convenient.
In v2 design i plan to use a simple 4mm female bananas,
that are more easy to find, and needs much less space. In counterpart,
a banana plug is always needed. But, what DIYers don't have that ?
Frex
With safety
Safety built-in socket, 4 mm diameter, contact-protected, with 4.8 x 0.8 tab connector complying with DIN 46 244, gold-plated brass.
For installation into switch panels and equipment chassis with wall thicknesses up to 6 mm.
Installation hole: 12.2 mm diameter
> Link
An externally hosted image should be here but it was not working when we last tested it.
Safety built-in socket, 4 mm diameter, contact-protected, with 4.8 x 0.8 tab connector complying with DIN 46 244, gold-plated brass.
For installation into switch panels and equipment chassis with wall thicknesses up to 6 mm.
Installation hole: 12.2 mm diameter
> Link
Last edited:
Hello all,
In this end of year, finding time to make design progress is a little bit more
difficult than i expected... Despite that, the schematic is 95% finished.
But of course, sometimes the 5% remaining are the most effort and time consuming !
So, it wasn't ready this week, but be sure are work on.
In fact, after taking time to draw schematic, i have made some changes too ;
To avoid the use of differential amplifier that support large common mode voltage
to sense V and I on each isolated channels, i have replaced them by moving
the ADCs on each channel.
So, now each channel have it's own 2 channels ADC (V+I measurements) and a two channels
DAC (V+I setting). The digitals links (SPI) of the DAC/ADC are driven through
optical isolators. In this configuration, there is only digital informations between the main
channel and the isolated channels.
Because all these changes have big implication in the CPLD design, and some functionality (auto-scale) has also been added from my previous design, it is necessary to design nearly completely the CPLD to be sure that it's size will be sufficient !
For that, i have work hard these days and a fisrt "beta" but full version of the CPLD is done.
The CPLD design fit in the device with 99% of cells used...
With a so little margin, i don't know if it's reasonable to stay with it....
(Maybe a replacement by EMP1270, but much expensive.)
I keep this in mind, i must to think about that.
To be continued !
Frex
In this end of year, finding time to make design progress is a little bit more
difficult than i expected... Despite that, the schematic is 95% finished.
But of course, sometimes the 5% remaining are the most effort and time consuming !
So, it wasn't ready this week, but be sure are work on.
In fact, after taking time to draw schematic, i have made some changes too ;
To avoid the use of differential amplifier that support large common mode voltage
to sense V and I on each isolated channels, i have replaced them by moving
the ADCs on each channel.
So, now each channel have it's own 2 channels ADC (V+I measurements) and a two channels
DAC (V+I setting). The digitals links (SPI) of the DAC/ADC are driven through
optical isolators. In this configuration, there is only digital informations between the main
channel and the isolated channels.
Because all these changes have big implication in the CPLD design, and some functionality (auto-scale) has also been added from my previous design, it is necessary to design nearly completely the CPLD to be sure that it's size will be sufficient !
For that, i have work hard these days and a fisrt "beta" but full version of the CPLD is done.
The CPLD design fit in the device with 99% of cells used...
With a so little margin, i don't know if it's reasonable to stay with it....
(Maybe a replacement by EMP1270, but much expensive.)
I keep this in mind, i must to think about that.
To be continued !
Frex
Hello all and happy new year !
I hope that the rest of it will be better than these previous
fu***ng days in my country !
As i said in my previous post, the CPLD was near to be full,
so i finally choose to jump in a bigger one.
My choice feel on the 5M1270ZT144C5N from MAX V series.
This IC allow 2x more gates than the EPM570 for the same price.
The package become a TQFP 144 pins instead of 100.
This margin will allow to design many others
interesting functionality to come.
Because many thing has changed from the first post, i have updated the
two synoptics with all new changes.
You can download them here :
EPSUX3V2 General synoptic
EPSUX3V2 Output block synoptic (one from three).
I have spend much time also to start a complete BOM file including
price list with almost parts available at Mouser.
The enclosure is (as always) the more expensive part, because it need
to be machined and engraved. I look to find an interesting solution for the first
prototype, and for a small batch. All is on the way !
I think that three parts are interesting to get in a batch to allow more easier build and professional look.
I will make a little survey to know which will be interested.
I come back soon.
Frex
(Just out of that, i received last week an "Analog Discovery" that probably many of you know, and i confirm that is a very good value for money tools ! You can also see how it work on a video from EEVblog here.
I really enjoy it !) )).
I hope that the rest of it will be better than these previous
fu***ng days in my country !
As i said in my previous post, the CPLD was near to be full,
so i finally choose to jump in a bigger one.
My choice feel on the 5M1270ZT144C5N from MAX V series.
This IC allow 2x more gates than the EPM570 for the same price.
The package become a TQFP 144 pins instead of 100.
This margin will allow to design many others
interesting functionality to come.
Because many thing has changed from the first post, i have updated the
two synoptics with all new changes.
You can download them here :
EPSUX3V2 General synoptic
EPSUX3V2 Output block synoptic (one from three).
I have spend much time also to start a complete BOM file including
price list with almost parts available at Mouser.
The enclosure is (as always) the more expensive part, because it need
to be machined and engraved. I look to find an interesting solution for the first
prototype, and for a small batch. All is on the way !
I think that three parts are interesting to get in a batch to allow more easier build and professional look.
- The LLC transformer (need some material and skill that not very convenient for DIYers).
- The Printed circuit board (Minimum requirement for professional quality tool ! Not a problem, i will use PCBcart or WE-direkt).
- Machining and printing of the front and rear panels.
I will make a little survey to know which will be interested.
I come back soon.
Frex
(Just out of that, i received last week an "Analog Discovery" that probably many of you know, and i confirm that is a very good value for money tools ! You can also see how it work on a video from EEVblog here.
I really enjoy it !
) )).